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Pressure sensitive semiconductor device with cantilevers

Assignee: Nissan Motor Co Ltd
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Filing: 1991-08-01
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Granted: 1992-08-11
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Expires: 2011-08-01
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Abstract

Abstract A semiconductor device comprises a semiconductor base having an aperture to form a first cantilever having a weight integral therewith, a second cantilever and a third cantilever. The second and third cantilevers are formed on the opposite sides of the first cantilever. The semiconductor device also comprises first and second piezo resistors formed in the first cantilevers, a third piezo resistor formed in the second cantilever, and a fourth piezo resistor formed in the third cantilever. The first, second, third and fourth piezo resistors are connected in a four-arm bridge circuit having a first pair of opposite arms comprised of the first and second piezo resistors, respectively, and a second pair of opposite arms comprised of the third and fourth piezo resistors, respectively, to compensate the first and second piezo resistors for temperature.

Inventors

  • 👤 Toshiro Shinohara

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 13:06
CPC Classifications
G; G01; G01P; G01P15/00; G01P15/02; G01P15/08; G01P15/12; G01P15/123

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 128 words
A semiconductor device comprising: a semiconductor base having an aperture to form a first cantilever having a weight integral therewith, a second cantilever and a third cantilever, the second and third cantilevers being formed on the opposite sides of the first cantilever; first and second piezo resistors formed in the first cantilever; a third piezo resistor formed in the second cantilever; and a fourth piezo resistor formed in the third cantilever; the first, second, third and fourth piezo resistors being connected in a four-arm bridge circuit having a first pair of opposite arms comprised of the first and second piezo resistors, respectively, and a second pair of opposite arms comprised of the third and fourth piezo resistors, respectively, to compensate the first and second piezo resistors for temperature.
Claim 2
Dependent Claim 128 words
A semiconductor device comprising: a semiconductor base having an aperture to form a first cantilever having a weight integral therewith, a second cantilever and a third cantilever, the second and third cantilevers being formed on the opposite sides of the first cantilever; first and second piezo resistors formed in the first cantilever; a third piezo resistor formed in the second cantilever; and a fourth piezo resistor formed in the third cantilever; the first, second, third and fourth piezo resistors being connected in a four-arm bridge circuit having a first pair of opposite arms comprised of the first and second piezo resistors, respectively, and a second pair of opposite arms comprised of the third and fourth piezo resistors, respectively, to compensate the first and second piezo resistors for temperature.
Claim 3
Dependent Claim 23 words
The semiconductor device as claimed in claim 1, wherein the third and fourth piezo resistors are symmetric with respect to the first cantilever.
Claim 4
Dependent Claim 47 words
The semiconductor device as claimed in claim 1, wherein the first cantilever has a longitudinal axis, wherein the first and second piezo resistors are symmetric with respect to the longitudinal axis, and wherein the third and fourth piezo resistors are symmetric with respect to the longitudinal axis.

References Cited (Backward Citations)

JPS60100474A Cited
JPS62213280A Cited
US4836025A Cited
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US4969359A Cited
US4987781A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-08-11 1996-02-10 1996-08-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-08-11 2000-02-10 2000-08-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-08-11 2004-02-10 2004-08-11 $7700.00 Window Closed / Lapsed

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