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US5128564A Expired / Lapsed US ⏱️ 0.0 years remaining

Input bias current compensation for a comparator

Assignee: Elantec Semiconductor LLC
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Filing: 1991-11-08
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Granted: 1992-07-07
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Expires: 2011-11-08
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Abstract

Abstract A current compensation circuit for a comparator includes a pair of switching transistors which supply input bias current to their corresponding comparator input transistors, a pair of current to voltage conversion means which use collector current from the comparator input transistors to turn on and off the appropriate switching transistor when its corresponding comparator input transistor is on, a transistor to generate a negative replica of the input bias current flowing in the comparator input, and a current mirror which is programmed by the replica of the uncompensated input bias current to produce a compensated input bias current to the switching transistors.

Inventors

  • 👤 Barry Harvey
  • 👤 Joseph Piernet

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 19:40
CPC Classifications
G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/265; H; H03; H03K; H03K17/00; H03K17/04; H03K17/041; H03K17/04113; H03K17/16; H03K5/00; H03K5/22; H03K5/24; H03K5/2409; H03K5/2418

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 361 words
An input bias current compensation circuit for generating bias current and switching said bias current between the input transistors of a high speed comparator having first and second comparator input transistors connected as a differential amplifier and having the outputs of said first and second input transistors connected to the inputs of a second differential stage of said comparator, said compensation circuit comprising; a first transistor including base, collector, and emitter electrodes and having its collector electrode connected to a voltage supply and its emitter electrode connected to a current source for generating a base current appropriate to the current flowing in the common emitter circuit of said differential amplifier; a current producing means coupled to the base of said first transistor for sensing the base current therein and for supplying a first current equal to said base current to an output; first and second switching transistors including base, collector, and emitter electrodes and having their emitter electrodes connected to the output of said current producing means; said first switching transistor having its collector connected to the base of said first comparator input transistor and its base connected to the collector of said first comparator input transistor for supplying said first current to the base of said first comparator input transistor when said first comparator input transistor is turned on; said second switching transistor having its collector connected to the base of said second comparator input transistor and its base connected to the collector of said second comparator input transistor for supplying said first current to the base of said second comparator input transistor when said second comparator input transistor is turned on, and; first and second current to voltage conversion means for changing the voltage at the base electrodes of said switching transistors to turn said switching transistors on and off in response to collector current flowing in said comparator input transistors; said first conversion means being connected between the base of said first switching transistor and a differential input of said second comparator stage; and, said second conversion means being connected between the base of said second switching transistor and a second differential input of said second comparator stage.
Claim 2
Dependent Claim 361 words
An input bias current compensation circuit for generating bias current and switching said bias current between the input transistors of a high speed comparator having first and second comparator input transistors connected as a differential amplifier and having the outputs of said first and second input transistors connected to the inputs of a second differential stage of said comparator, said compensation circuit comprising; a first transistor including base, collector, and emitter electrodes and having its collector electrode connected to a voltage supply and its emitter electrode connected to a current source for generating a base current appropriate to the current flowing in the common emitter circuit of said differential amplifier; a current producing means coupled to the base of said first transistor for sensing the base current therein and for supplying a first current equal to said base current to an output; first and second switching transistors including base, collector, and emitter electrodes and having their emitter electrodes connected to the output of said current producing means; said first switching transistor having its collector connected to the base of said first comparator input transistor and its base connected to the collector of said first comparator input transistor for supplying said first current to the base of said first comparator input transistor when said first comparator input transistor is turned on; said second switching transistor having its collector connected to the base of said second comparator input transistor and its base connected to the collector of said second comparator input transistor for supplying said first current to the base of said second comparator input transistor when said second comparator input transistor is turned on, and; first and second current to voltage conversion means for changing the voltage at the base electrodes of said switching transistors to turn said switching transistors on and off in response to collector current flowing in said comparator input transistors; said first conversion means being connected between the base of said first switching transistor and a differential input of said second comparator stage; and, said second conversion means being connected between the base of said second switching transistor and a second differential input of said second comparator stage.
Claim 3
Dependent Claim 20 words
The circuit of claim 1, wherein said first and second current to voltage conversion means are a pair of resistors.
Claim 4
Dependent Claim 20 words
The circuit of claim 1, wherein said first and second current to voltage conversion means are a pair of diodes.
Claim 5
Dependent Claim 27 words
The circuit of claim 2, wherein the current gain of said first transistor is matched to the current gain of the first and second comparator input transistors.
Claim 6
Dependent Claim 27 words
The circuit of claim 3, wherein the current gain of said first transistor is matched to the current gain of the first and second comparator input transistors.
Claim 7
Dependent Claim 42 words
The circuit of claim 4, wherein the current source connected to the emitter of said first transistor produces a current through said first transistor equal to the current flowing in the common emitter circuit of said first and second comparator input transistors.
Claim 8
Dependent Claim 51 words
The circuit of claim 6, wherein said current producing means is a current mirror having an input connected to the base of said first transistor and having an output connected to the emitters of said second and third transistors for supplying input bias current to said first and second switching transistors.

References Cited (Backward Citations)

US4591743A Cited
US4760286A Cited
US5039888A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-07-07 1996-01-06 1996-07-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-07-07 2000-01-06 2000-07-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-07-07 2004-01-06 2004-07-07 $7700.00 Window Closed / Lapsed

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