Patent US5126743A successfully refreshed from Google Patents.
US5126743A
Expired / Lapsed
US
⏱️ 0.0 years remaining
System and method for converting a DSB input signal to a frequency encoded output signal
Assignee: NEW SD Inc A Corp OF DELAWARE
•
Filing: 1991-02-15
•
Granted: 1992-06-30
•
Expires: 2011-02-15
Abstract
Abstract An integrating voltage-to-frequency converter and method for converting a DSB-SC signal into a frequency-encoded signal. The DSB-SC signal is demodulated using an up/down counter, the count direction of which is alternatively switched in synchronism with the phase polarity of a reference carrier signal for the DSB-SC signal. The converter includes an integrator, a comparator, and means for rebalancing the integrator circuit. Means for tracking and storing a partial-bit analog signal level at the output of the integrator are provided, where the partial-bit analog signal level is obtained just prior to a phase transition of the reference carrier signal. The count of the up/down counter is corrected thereby to account for the partial-bit analog signal information. A capacitor is used to sample the partial-bit analog signal information and to transfer that information into the input of the operational amplifier to provide an opposite polarity correction charge to the integrator to correct for the partial-bit analog signal information as it is detected by the up/down counter. A digital system for converting the partial-bit analog signal level to a binary code word is provided. A number of binary code words are summed together to form an algebraic sum and means are provided for detecting that the algebraic sum exceeds a certain value so that a correction count for the up/down counter demodulator is provided to increment the up/down counter.
Inventors
- 👤 Larry P. Hobbs
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 09:14
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/60
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
157 words
In a voltage-to-frequency converter for converting a DSB-SC input signal to a frequency encoded output signal: means for integrating the input signal; means responsive to the integrated input signal for providing an output pulse when the integrated signal reaches a predetermined level; means for resetting the integrated signal to an initial level in response to the output pulse; an up/down counter responsive to the output pulse; means for switching the up/down counter between up and down counting modes in response to phase transitions in a reference carrier for the DSB-SC signal; means for storing a signal corresponding to the level of the integrated signal at the time of a phase transition in the reference carrier; and means for adjusting the count of the up/down counter in accordance with the stored signal to account for signals which have been integrated but have not reached a level sufficient to produce an output pulse at the time a transition occurs.
Claim 2
Dependent Claim
157 words
In a voltage-to-frequency converter for converting a DSB-SC input signal to a frequency encoded output signal: means for integrating the input signal; means responsive to the integrated input signal for providing an output pulse when the integrated signal reaches a predetermined level; means for resetting the integrated signal to an initial level in response to the output pulse; an up/down counter responsive to the output pulse; means for switching the up/down counter between up and down counting modes in response to phase transitions in a reference carrier for the DSB-SC signal; means for storing a signal corresponding to the level of the integrated signal at the time of a phase transition in the reference carrier; and means for adjusting the count of the up/down counter in accordance with the stored signal to account for signals which have been integrated but have not reached a level sufficient to produce an output pulse at the time a transition occurs.
Claim 3
Dependent Claim
43 words
The voltage-to-frequency converter of claim 1 wherein the means for adjusting the count includes means for reducing the level of the integrated signal after the transition by an amount determined by the level of the integrated signal at the time of the transition.
Claim 4
Dependent Claim
50 words
The voltage-to-frequency converter of claim 1 wherein the means for storing a signal includes means for providing a digital signal corresponding to the level of the integrated signal at the time of the transition, and the means for adjusting the count includes for combining the digital signal with the count.
Claim 5
Dependent Claim
163 words
In a voltage-to-frequency converter for converting a DSB-SC input signal to a frequency encoded output signal: an integrator for integrating the input signal; means responsive to the integrated input signal for providing an output pulse when the integrated signal reaches a predetermined level; means for resetting the integrated signal to an initial level in response to the output pulse; an up/down counter responsive to the output pulse; means for switching the up/down counter between up and down counting modes in response to phase transitions in a reference carrier for the DSB-SC signal; a storage capacitor; means for applying a charge to the capacitor corresponding to the level of the integrated signal at the time of a phase transition in the reference carrier; and means for applying the charge from the capacitor to the integrator after the transition to reduce the level of the integrated signal by an amount corresponding to twice the level of the integrated signal at the time of the transition.
Claim 6
Dependent Claim
163 words
In a voltage-to-frequency converter for converting a DSB-SC input signal to a frequency encoded output signal: an integrator for integrating the input signal; means responsive to the integrated input signal for providing an output pulse when the integrated signal reaches a predetermined level; means for resetting the integrated signal to an initial level in response to the output pulse; an up/down counter responsive to the output pulse; means for switching the up/down counter between up and down counting modes in response to phase transitions in a reference carrier for the DSB-SC signal; a storage capacitor; means for applying a charge to the capacitor corresponding to the level of the integrated signal at the time of a phase transition in the reference carrier; and means for applying the charge from the capacitor to the integrator after the transition to reduce the level of the integrated signal by an amount corresponding to twice the level of the integrated signal at the time of the transition.
Claim 7
Dependent Claim
69 words
The voltage-to-frequency converter of claim 4 wherein the integrator comprises an operational amplifier and an integrating capacitor connected between the output and inverting input terminals of the operational amplifier, the storage capacitor has a capacitance equal to twice the capacitance of the integrating capacitor, and the means for applying the charge to the integrator includes means for connecting the storage capacitor to the inverting input of the operational amplifier.
Claim 8
Dependent Claim
171 words
In a voltage-to-frequency converter for converting a DSB-SC input signal to a frequency encoded output signal: means for integrating the input signal; means responsive to the integrated input signal for providing an output pulse when the integrated signal reaches a predetermined level; means for resetting the integrated signal to an initial level in response to the output pulse; an up/down counter responsive to the output pulse for providing a signal containing most significant bit information for a demodulated signal corresponding to the input signal; means for switching the up/down counter between up and down counting modes in response to phase transitions in a reference carrier for the DSB-SC signal; means responsive to the level of the integrated signal at the time of a phase transition in the reference carrier for providing a digital signal containing least significant bit information for a demodulated signal corresponding to the input signal; and means for combining the signals containing the most significant bit information and the least significant bit information to provide an output signal.
Claim 9
Dependent Claim
171 words
In a voltage-to-frequency converter for converting a DSB-SC input signal to a frequency encoded output signal: means for integrating the input signal; means responsive to the integrated input signal for providing an output pulse when the integrated signal reaches a predetermined level; means for resetting the integrated signal to an initial level in response to the output pulse; an up/down counter responsive to the output pulse for providing a signal containing most significant bit information for a demodulated signal corresponding to the input signal; means for switching the up/down counter between up and down counting modes in response to phase transitions in a reference carrier for the DSB-SC signal; means responsive to the level of the integrated signal at the time of a phase transition in the reference carrier for providing a digital signal containing least significant bit information for a demodulated signal corresponding to the input signal; and means for combining the signals containing the most significant bit information and the least significant bit information to provide an output signal.
Claim 10
Dependent Claim
75 words
The voltage-to-frequency converter of claim 6 wherein the means for providing the signal containing the least significant bit information includes: an analog-to-digital converter for providing digital words corresponding to the level of the integrated signal at the times of successive transitions in the reference carrier; an accumulator having means for adding the digital words for successive transitions together; and means for incrementing the count in the up/down counter when an overflow occurs in the accumulator.
Claim 11
Dependent Claim
50 words
The voltage-to-frequency converter of claim 6 wherein the means for combining the signals containing the bit information to provide the output signal comprises a shift register to which the signals containing the bit information are applied, and means for reading the information out of the shift register in serial fashion.
Claim 12
Dependent Claim
149 words
In a method of converting a DSB-SC input signal to a frequency encoded output signal, the steps of: integrating the input signal; monitoring the integrated input signal and providing an output pulse when the integrated signal reaches a predetermined level; resetting the integrated signal to an initial level in response to the output pulse; advancing an up/down counter in response to the output pulse; switching the up/down counter between up and down counting modes in response to phase transitions in a reference carrier for the DSB-SC signal; storing a signal corresponding to the level of the integrated signal at the time of a phase transition in the reference carrier; and adjusting the count of the up/down counter in accordance with the stored signal to account for signals which have been integrated but have not reached a level sufficient to produce an output pulse at the time a transition occurs.
Claim 13
Dependent Claim
149 words
In a method of converting a DSB-SC input signal to a frequency encoded output signal, the steps of: integrating the input signal; monitoring the integrated input signal and providing an output pulse when the integrated signal reaches a predetermined level; resetting the integrated signal to an initial level in response to the output pulse; advancing an up/down counter in response to the output pulse; switching the up/down counter between up and down counting modes in response to phase transitions in a reference carrier for the DSB-SC signal; storing a signal corresponding to the level of the integrated signal at the time of a phase transition in the reference carrier; and adjusting the count of the up/down counter in accordance with the stored signal to account for signals which have been integrated but have not reached a level sufficient to produce an output pulse at the time a transition occurs.
Claim 14
Dependent Claim
38 words
The method of claim 9 wherein the count is adjusted by reducing the level of the integrated signal after the transition by an amount determined by the level of the integrated signal at the time of the transition.
Claim 15
Dependent Claim
42 words
The method of claim 9 wherein the signal is stored by providing a digital signal corresponding to the level of the integrated signal at the time of the transition, and the count is adjusted by combining the digital signal with the count.
Claim 16
Dependent Claim
153 words
In a method of converting a DSB-SC input signal to a frequency encoded output signal, the steps of: integrating the input signal in an integrator; monitoring the integrated input signal and providing an output pulse when the integrated signal reaches a predetermined level; resetting the integrated signal to an initial level in response to the output pulse; advancing an up/down counter in response to the output pulse; switching the up/down counter between up and down counting modes in response to phase transitions in a reference carrier for the DSB-SC signal; storing a charge on a storage capacitor corresponding to the level of the integrated signal at the time of a phase transition in the reference carrier; and applying the stored charge to the integrator after the transition to reduce the level of the integrated signal by an amount corresponding to twice the level of the integrated signal at the time of the transition.
Claim 17
Dependent Claim
153 words
In a method of converting a DSB-SC input signal to a frequency encoded output signal, the steps of: integrating the input signal in an integrator; monitoring the integrated input signal and providing an output pulse when the integrated signal reaches a predetermined level; resetting the integrated signal to an initial level in response to the output pulse; advancing an up/down counter in response to the output pulse; switching the up/down counter between up and down counting modes in response to phase transitions in a reference carrier for the DSB-SC signal; storing a charge on a storage capacitor corresponding to the level of the integrated signal at the time of a phase transition in the reference carrier; and applying the stored charge to the integrator after the transition to reduce the level of the integrated signal by an amount corresponding to twice the level of the integrated signal at the time of the transition.
Claim 18
Dependent Claim
63 words
The method of claim 12 wherein the integrator comprises an operational amplifier and an integrating capacitor connected between the output and inverting input terminals of the operational amplifier, the storage capacitor has a capacitance equal to twice the capacitance of the integrating capacitor, and the stored charge to the integrator by connecting the storage capacitor to the inverting input of the operational amplifier.
Claim 19
Dependent Claim
160 words
In a method of converting a DSB-SC input signal to a frequency encoded output signal, the steps of: integrating the input signal; monitoring the integrated input signal and providing an output pulse when the integrated signal reaches a predetermined level; resetting the integrated signal to an initial level in response to the output pulse; applying the output pulse to an up/down counter to provide a signal containing most significant bit information for a demodulated signal corresponding to the input signal; switching the up/down counter between up and down counting modes in response to phase transitions in a reference carrier for the DSB-SC signal; converting the level of the integrated signal at the time of a phase transition in the reference carrier to a digital signal containing least significant bit information for a demodulated signal corresponding to the input signal; and combining the signals containing the most significant bit information and the least significant bit information to provide an output signal.
Claim 20
Dependent Claim
160 words
In a method of converting a DSB-SC input signal to a frequency encoded output signal, the steps of: integrating the input signal; monitoring the integrated input signal and providing an output pulse when the integrated signal reaches a predetermined level; resetting the integrated signal to an initial level in response to the output pulse; applying the output pulse to an up/down counter to provide a signal containing most significant bit information for a demodulated signal corresponding to the input signal; switching the up/down counter between up and down counting modes in response to phase transitions in a reference carrier for the DSB-SC signal; converting the level of the integrated signal at the time of a phase transition in the reference carrier to a digital signal containing least significant bit information for a demodulated signal corresponding to the input signal; and combining the signals containing the most significant bit information and the least significant bit information to provide an output signal.
Claim 21
Dependent Claim
63 words
The method of claim 14 wherein the signal containing the least significant bit information is provided by: providing digital words corresponding to the level of the integrated signal at the times of successive transitions in the reference carrier; accumulating the digital words for successive transitions in an accumulator; and incrementing the count in the up/down counter when an overflow occurs in the accumulator.
Claim 22
Dependent Claim
42 words
The method of claim 14 wherein the signals containing the bit information are combined by applying said signals to the inputs of a shift register, and reading the information out of the shift register in serial fashion to provide the output signal.
References Cited (Backward Citations)
US4034364A
Cited
US4164733A
Cited
US4529965A
Cited
US4672361A
Cited
US4980687A
Cited
US4994807A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-06-30 | 1995-12-30 | 1996-06-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-06-30 | 1999-12-30 | 2000-06-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-06-30 | 2003-12-30 | 2004-06-30 | $7700.00 | Window Closed / Lapsed |