US5122760A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Detector for automatic gain control amplifier circuit
Assignee: Renesas Electronics Corp
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Filing: 1991-05-17
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Granted: 1992-06-16
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Expires: 2011-05-17
Abstract
Abstract A detector for use in an automatic gain control amplifier and operated to generate a gain control voltage in response to an amplitude of the output signal of an amplifier circuit includes five transistors connected in a detector circuit. The first transistor receives a bias voltage at its base and the second transistor receives a true signal of an input signal along with the bias voltage at its base. The third transistor receives a complementary signal of the input signal along with the bias voltage at its base. A first current source is connected in common to the emitters of the first to third transistors. A control voltage is supplied between the bases of the fourth and fifth transistors. A second current source supplies an operating current to the fourth and fifth transistors. A first load is connected in common to the collectors of the first and the fourth transistors. A second load is connected in common to the collectors of the second, third and fifth transistors. A first output terminal of the detector is connected to the collectors of the first and fourth transistors, and a second output terminal of the detector is connected to the collectors of the second, third and fifth transistors. The detector reduces or eliminates temperature dependence of the amplitude of the output of the amplifier circuit.
Inventors
- 👤 Kazunori Nishijima
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 06:22
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; G; G01; G01R; G01R19/00; G01R19/32; H03G1/00; H03G1/04
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
150 words
A detector comprising a first transistor receiving a bias voltage at its base, a second transistor receiving a true signal of an input signal along with said bias voltage at its base, a third transistor receiving a complementary signal of said input signal along with said bias voltage at its base, a first current source connected in common to emitters of siad first, second and third transistors, a fourth and a fifth transistor having bases between which a control voltage is supplied, a second current source, means for supplying a current of said second current source to said fourth and fifth transistors, a first load connected in common to collectors of said first and fourth transistors, a second load connected in common to collectors of said second, third, and fifth transistors, a first output terminal derived from said first load, and a second output terminal derived from said second load.
Claim 2
Dependent Claim
150 words
A detector comprising a first transistor receiving a bias voltage at its base, a second transistor receiving a true signal of an input signal along with said bias voltage at its base, a third transistor receiving a complementary signal of said input signal along with said bias voltage at its base, a first current source connected in common to emitters of siad first, second and third transistors, a fourth and a fifth transistor having bases between which a control voltage is supplied, a second current source, means for supplying a current of said second current source to said fourth and fifth transistors, a first load connected in common to collectors of said first and fourth transistors, a second load connected in common to collectors of said second, third, and fifth transistors, a first output terminal derived from said first load, and a second output terminal derived from said second load.
Claim 3
Dependent Claim
26 words
The detector as claimed in claim 1, wherein each of said first and said second current sources includes a transistor biased by a band gap voltage.
Claim 4
Dependent Claim
43 words
The detector as claimed in claim 2, wherein said supplying means comprises a first resistor connecting the emitter of said fourth transistor to said second current source and a second resistor connecting the emitter of said fifth transistor to said second current source.
Claim 5
Dependent Claim
49 words
The detector as claimed in claim 2, wherein said supplying means comprises a resistor connecting the emitters of said fourth and fifth transistors to each other and said second current source has first and second current output nodes connected to the emitters of said fourth and fifth transistors, respectively.
Claim 6
Dependent Claim
127 words
A detector comprising first, second and third transistors connected to form a first differential circuit, means for supplying said first transistor with a bias voltage, means for supplying said second transistor with a first signal along with said bias voltage, means for supplying said third transistor with a second signal having a phase opposite to the phase of said first signal along with said bias voltage, fourth and fifth transistors conencted to form a second differential circuit, means for applying a control voltage between said fourth and fifth transistors, a first load connected in common to said first and fourth transistors to produce a first output signal, and a second load connected in common to said second, third and fifth transistors to produce a second output signal.
Claim 7
Dependent Claim
127 words
A detector comprising first, second and third transistors connected to form a first differential circuit, means for supplying said first transistor with a bias voltage, means for supplying said second transistor with a first signal along with said bias voltage, means for supplying said third transistor with a second signal having a phase opposite to the phase of said first signal along with said bias voltage, fourth and fifth transistors conencted to form a second differential circuit, means for applying a control voltage between said fourth and fifth transistors, a first load connected in common to said first and fourth transistors to produce a first output signal, and a second load connected in common to said second, third and fifth transistors to produce a second output signal.
Claim 8
Dependent Claim
51 words
The detector as claimed in claim 5, further comprising a first current source for supplying a first operating current to said first differential circuit and a second current source for supplying a second operating current to said second differential circuit, each of said first and second operating current having temperature dependence.
Claim 9
Dependent Claim
209 words
In an automatic gain control amplifier circuit comprising an amplifier circuit for amplifying an input signal, and a detection circuit for generating a gain control voltage in response to an amplitude of an output signal from the amplifier circuit, the detector circuit comprising a first transistor receiving a bias voltage at its base, a second transistor receiving a true signal of an input signal along with said bias voltage at its base, a third transistor receiving a complementary signal of said input signal along with said bias voltage at its base, a first current source connected in common to emitters of said first, second and third transistors, a fourth and a fifth transistor having bases between which a control voltage is supplied, a second current source, means for supplying a current of said second current source to said fourth and fifth transistors, a first load conencted in common to collectors of said first and fourth transistors, a second load connected in common to collectors of said second, third, and fifth transistors, a first output terminal derived from said first load, and a second output terminal derived from said second load, whereby temperature dependence of the amplitude of the output signal from the amplifier circuit is at least substantially reduced.
Claim 10
Dependent Claim
209 words
In an automatic gain control amplifier circuit comprising an amplifier circuit for amplifying an input signal, and a detection circuit for generating a gain control voltage in response to an amplitude of an output signal from the amplifier circuit, the detector circuit comprising a first transistor receiving a bias voltage at its base, a second transistor receiving a true signal of an input signal along with said bias voltage at its base, a third transistor receiving a complementary signal of said input signal along with said bias voltage at its base, a first current source connected in common to emitters of said first, second and third transistors, a fourth and a fifth transistor having bases between which a control voltage is supplied, a second current source, means for supplying a current of said second current source to said fourth and fifth transistors, a first load conencted in common to collectors of said first and fourth transistors, a second load connected in common to collectors of said second, third, and fifth transistors, a first output terminal derived from said first load, and a second output terminal derived from said second load, whereby temperature dependence of the amplitude of the output signal from the amplifier circuit is at least substantially reduced.
Claim 11
Dependent Claim
26 words
The circuit as claimed in claim 7, wherein each of said first and said second current sources includes a transistor biased by a band gap voltage.
Claim 12
Dependent Claim
43 words
The circuit as claimed in claim 8, wherein said supplying means comprises a first resistor connecting the emitter of said fourth transistor to said second current source and a second resistor connecting the emitter of said fifth transistor to said second current source.
Claim 13
Dependent Claim
49 words
The circuit as claimed in claim 8, wherein said supplying means comprises a resistor connecting the emitters of said fourth and fifth transistors to each other and said second current source has first and second current output nodes connected to the emitters of said fourth and fifth transistors, respectively.
Claim 14
Dependent Claim
167 words
In an automatic gain control amplifier circuit comprising an amplifier circuit for amplifying an input signal, and a detector circuit for generating a gain control voltage in response to an amplitude of an output signal of the amplifier circuit, the detector circuit comprising: first, second and third transistors connected to form a first differential circuit; means for supplying said first transistor with a bias voltage; means for supplying said second transistor with a first signal along with said bias voltage; means for supplying said third transistor with a second signal having a phase opposite to a phase of said first signal along with said bias voltage; fourth and fifth transistors connected to form a second differential circuit; means for applying a control voltage between said fourth and fifth transistors; a first load connected in common to said first and fourth transistors to produce a first output signal; and a second load connected in common to said second, third and fifth transistors to produce a second output signal.
Claim 15
Dependent Claim
167 words
In an automatic gain control amplifier circuit comprising an amplifier circuit for amplifying an input signal, and a detector circuit for generating a gain control voltage in response to an amplitude of an output signal of the amplifier circuit, the detector circuit comprising: first, second and third transistors connected to form a first differential circuit; means for supplying said first transistor with a bias voltage; means for supplying said second transistor with a first signal along with said bias voltage; means for supplying said third transistor with a second signal having a phase opposite to a phase of said first signal along with said bias voltage; fourth and fifth transistors connected to form a second differential circuit; means for applying a control voltage between said fourth and fifth transistors; a first load connected in common to said first and fourth transistors to produce a first output signal; and a second load connected in common to said second, third and fifth transistors to produce a second output signal.
Claim 16
Dependent Claim
52 words
The circuit as claimed in claim 11, and further comprising a first current source for supplying a first operating current to said first differential circuit, and a second current source for supplying a second operating current to said second differential circuit, each of said first and second operating current having temperature dependence.
References Cited (Backward Citations)
US4724337A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-06-16 | 1995-12-16 | 1996-06-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-06-16 | 1999-12-16 | 2000-06-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-06-16 | 2003-12-16 | 2004-06-16 | $7700.00 | Window Closed / Lapsed |