US4724337A
Expired / Lapsed
US
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Automatic gain control detection circuit
Assignee: Toshiba Corp
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Filing: 1986-03-27
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Granted: 1988-02-09
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Expires: 2006-03-27
Abstract
Abstract An automatic gain control (AGC) detection circuit. The AGC detection circuit includes; a current source, first to fourth transistors whose emitters are connected in common to the current source, a reference voltage source for supplying the bases of the first and the second transistors with a reference voltage, input terminal means connected to the bases of the third and the fourth transistors for receiving an input signal, a power supply source for supplying the first to fourth transistors with a power supply voltage, first collector load means connected between the power supply source and a node connecting the collectors of the first and second transistors in common, second collector load means connected between the power supply source and another node connecting the collectors of the third and fourth transistors in common, and an output terminal means connected between the nodes for taking out an automatic gain control detection output.
Inventors
- 👤 Jyoji Maeda
- 👤 Kazuo Hasegawa
- 👤 Yasunori Miyahara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 16:37
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/3005; H03G1/00; H03G1/04
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
153 words
An automatic gain control detection circuit, comprising: a current source, first to fourth transistors whose emitters are connected in common to said current source, a single reference voltage source connected to the bases of said first and said second transistors for supplying said first and second transistors with a single reference voltage, input terminal means connected to the base of said third and said fourth transistors for receiving an input signal, a power supply source for supplying said first to fourth transistors with a power supply voltage, first collector load means connected between said power supply source and a node connecting the collectors of said first and second transistors in common, second collector load means connected between said power supply source and another node connecting the collectors of said third and fourth transistors in common, and an output terminal means connected between said nodes for taking out an automatic gain control detection output.
Claim 2
Dependent Claim
153 words
An automatic gain control detection circuit, comprising: a current source, first to fourth transistors whose emitters are connected in common to said current source, a single reference voltage source connected to the bases of said first and said second transistors for supplying said first and second transistors with a single reference voltage, input terminal means connected to the base of said third and said fourth transistors for receiving an input signal, a power supply source for supplying said first to fourth transistors with a power supply voltage, first collector load means connected between said power supply source and a node connecting the collectors of said first and second transistors in common, second collector load means connected between said power supply source and another node connecting the collectors of said third and fourth transistors in common, and an output terminal means connected between said nodes for taking out an automatic gain control detection output.
Claim 3
Dependent Claim
29 words
An automatic gain control detection circuit detection circuit according to claim 1, wherein said third and fourth transistors are set with their base potentials equal to said reference voltage.
Claim 4
Dependent Claim
34 words
An automatic gain control detection circuit detection circuit according to claim 1, wherein said third and fourth transistors are set with their base potentials to have a predetermined potential difference from said reference voltage.
Claim 5
Dependent Claim
40 words
An automatic gain control detection circuit detection circuit according to claim 1, wherein said automatic gain control detection circuit further comprises an input signal processing circuit which provides said input terminals with the input signal proportional to the absolute temperature.
Claim 6
Dependent Claim
24 words
An automatic gain control detection circuit as claimed in claim 1, in which said current source provides a current proportional to the absolute temperature.
References Cited (Backward Citations)
JPS58213517A
Cited
JPS5989010A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-02-08 | 1991-08-10 | 1992-02-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-02-08 | 1995-08-10 | 1996-02-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-02-08 | 1999-08-10 | 2000-02-09 | $7700.00 | Window Closed / Lapsed |