Optically intraconnected computer employing dynamically reconfigurable holographic optical element

Claim 2

In a computer including a memory for holding a sequence of instructions to be executed, logic for accessing the instructions in sequence, logic for determining for each instruction a function to be performed and an effective address thereof, and logic for executing each instruction, the improvement wherein: (a) the logic for executing instructions comprises: a plurality of individual elements on a common support substrate optimized to perform certain logical sequences employed in executing instructions; and (b) the computer comprises: element selection logic means connected to the logic determining the function to be performed for each instruction for determining a class of each function and for causing the instruction to be executed by those of said elements which perform those of said logical sequences affecting the instruction execution in an optimum manner.

Claim 3

The improvement to a computer of claim 1 wherein: said element selection logic means includes means for accepting dynamic inputs designating changes in an operating environment of the computer and means for changing the ones of said elements which execute each instruction as a function of said dynamic inputs whereby instruction execution is affected in an optimum manner for the present dynamic conditions.

Claim 4

The improvement to a computer of claim 1 wherein: said elements comprise individual arithmetic and logic units contained on a single central processor unit chip.

Claim 5

The improvement to a computer of claim 1 wherein: said elements comprise individual reduced instruction set computers contained on a single central processor unit chip.

Claim 6

The improvement to a computer of claim 1 wherein: said element selection logic means portion for causing the instruction to be executed by those of said elements which perform those of said logical sequences affecting the instruction execution in an optimum manner includes means for transmitting and switching signals to said elements optically.

Claim 7

The improvement to a computer of claim 5 wherein said means for transmitting and switching signals to said elements optically comprises: a) a holographic optical element including a holographic reflective surface mounted adjacent and parallel to said common support substrate; b) a plurality of light source means carried by said common support substrate for directing signal-modified light beams towards said holographic reflective surface to be reflected thereby back towards said common support substrate; and, c) a plurality of light detecting means carried by said common support substrate and operably connected to respective ones of said elements to provide electrical signals thereto for detecting selected ones of said light beams as reflected by said holographic reflective surface and for providing associated electrical signals derived from said reflected light beams to said elements.

Claim 8

The improvement to a computer of claim 6 and additionally comprising: means for individually and selectively switching said light source means on and off to determine which ones of said light detecting means receive said reflected light beams whereby the sequence of said elements receiving and processing said signals is determined.

Claim 9

The improvement to a computer of claim 6 and additionally comprising: light modulation means disposed between said light source means and said light detecting means for individually and selectively blocking and passing said light beams whereby the sequence of said elements receiving and processing said signals is determined.

Claim 10

The improvement to a computer of claim 8 wherein: said light modulation means is disposed adjacent said reflective surface of said holographic optical element.

Claim 11

The improvement to a computer of claim 5 wherein said means for optically transmitting and switching signals to said elements comprises: a) a reconfigurable holographic optical element device including a holographic reflective surface mounted adjacent and parallel to said common support substrate and including light modulation means disposed adjacent said holographic reflective surface for selectively blocking and passing light beams from reflecting from said holographic reflective surface at individual pixel positions thereof; b) a plurality of light source means carried by said common support substrate for directing signal-modified light beams towards said holographic reflective surface to be reflected thereby back towards said common support substrate; c) a plurality of light detecting means carried by said common support substrate and operably connected to respective ones of said elements to provide electrical signals thereto for detecting selected ones of said light beams as reflected by said holographic reflective surface and for providing associated electrical signals derived from said reflected light beams to said elements; and, d) means for switching said light modulation means on and off at said individual pixel positions thereof to determine which ones of said light detecting means receive said reflected light beams whereby the sequence of said elements receiving and processing said signals is determined.

Claim 12

In a computer including a memory for holding a sequence of instructions to be executed, logic for accessing the instructions in sequence, logic for determining for each instruction a function to be performed and an effective address thereof, and logic for executing each instruction, a method of operation by said computer, wherein said logic for executing each instruction comprises a plurality of individual elements on a common support substrate with each element optimized to perform certain logical sequences employed in executing instructions, said method comprising for each instruction the steps of: (a) determining the function to be performed; (b) determining a class of each function; (c) causing the instruction to be executed by those elements which perform the associated logical sequences affecting the instruction execution in an optimum manner.

Claim 13

In a computer including a memory for holding a sequence of instructions to be executed, logic for accessing the instructions in sequence, logic for determining for each instruction a function to be performed and an effective address thereof, and logic for executing each instruction, a method of operation by said computer, wherein said logic for executing each instruction comprises a plurality of individual elements on a common support substrate with each element optimized to perform certain logical sequences employed in executing instructions, said method comprising for each instruction the steps of: (a) determining the function to be performed; (b) determining a class of each function; (c) causing the instruction to be executed by those elements which perform the associated logical sequences affecting the instruction execution in an optimum manner.

Claim 14

The method of claim 11 and additionally comprising the steps of: a) accepting dynamic inputs designating changes in an operating environment of the computer; and, b) changing the ones of the elements which execute each instruction as a function of the dynamic inputs whereby instruction execution is affected in an optimum manner for the present dynamic conditions.

Claim 15

The method of claim 11 wherein said step of causing the instruction to be executed by the elements which perform the associated logical sequences affecting the instruction execution in an optimum manner includes the step of: optically transmitting and switching signals to the elements.

Claim 16

The method of claim 13 wherein said step of optically transmitting and switching signals to the elements comprises the steps of: a) disposing a holographic optical element including a holographic reflective surface adjacent and parallel to the common support substrate; b) disposing a plurality of light sources on the common support substrate for directing signal-modified light beams towards the holographic reflective surface to be reflected thereby back towards the common support substrate; c) disposing a plurality of light detectors on the common support substrate and operably connecting them to respective ones of the elements to provide electrical signals thereto; d) selectively switching the light sources on and off to determine which ones of the light detector receive the reflected light beams; and, e) detecting selected ones of the light beams as reflected by the holographic reflective surface and providing associated electrical signals derived from the reflected light beams whereby the sequence of the elements receiving and processing the signals is determined.

Claim 17

The method of claim 13 wherein said step of transmitting and switching signals to the elements optically comprises the steps of: a) disposing a reconfigurable holographic optical element including a holographic reflective surface and light modulation means adjacent the holographic reflective surface for selectively blocking and passing light beams from reflecting from the holographic reflective surface at individual pixel positions thereof adjacent and parallel to the common support substrate; b) disposing a plurality of light sources on the common support substrate for directing signal-modified light beams towards the holographic reflective surface to be reflected thereby back towards the common support substrate; c) disposing a plurality of light detectors on the common support substrate and operably connecting them to respective ones of the elements to provide electrical signals thereto; d) selectively switching the light modulation means on and off at the individual pixel positions thereof to determine which ones of the light detecting means receive the reflected light beams; and, e) detecting selected ones of the light beams as reflected by the holographic reflective surface and providing associated electrical signals derived from the reflected light beams to the associated elements whereby the sequence of the elements receiving and processing the signals is determined.

Claim 18

A computer comprising: (a) a memory for holding a sequence of instructions to be executed; (b) logic for accessing said instructions in sequence; (c) logic for determining for each said instruction a function to be performed and an effective address thereof; (d) a plurality of individual elements on a common support substrate optimized to perform certain logical sequences employed in executing said instructions; and, (e) element selection logic means connected to said logic determining the function to be performed for each said instruction for determining a class of each function and for causing the instruction to be executed by those of said elements which perform those of said logical sequences affecting the instruction execution in an optimum manner.

Claim 19

A computer comprising: (a) a memory for holding a sequence of instructions to be executed; (b) logic for accessing said instructions in sequence; (c) logic for determining for each said instruction a function to be performed and an effective address thereof; (d) a plurality of individual elements on a common support substrate optimized to perform certain logical sequences employed in executing said instructions; and, (e) element selection logic means connected to said logic determining the function to be performed for each said instruction for determining a class of each function and for causing the instruction to be executed by those of said elements which perform those of said logical sequences affecting the instruction execution in an optimum manner.

Claim 20

The computer of claim 16 wherein: said element selection logic means includes means for accepting dynamic inputs designating changes in an operating environment of the computer and means for changing the ones of said elements which execute each instruction as a function of said dynamic inputs whereby instruction execution is affected in an optimum manner for the present dynamic conditions.

Claim 21

The computer of claim 16 wherein: said elements comprise individual arithmetic and logic units contained on a single central processor unit chip.

Claim 22

The computer of claim 16 wherein: said elements comprise individual reduced instruction set computers contained on a single central processor unit chip.

Claim 23

The computer of claim 16 wherein: said element selection logic means portion for causing the instruction to be executed by those of said elements which perform those of said logical sequences affecting the instruction execution in an optimum manner including means for transmitting and switching signals to said elements optically.

Claim 24

The computer of claim 20 wherein said means for transmitting and switching signals to said elements optically comprises: a) a holographic optical element including a holographic reflective surface mounted adjacent and parallel to said common support substrate; b) a plurality of light source means carried by said common support substrate for directing signal-modified light beams towards said holographic reflective surface to be reflected thereby back towards said common support substrate; and, c) a plurality of light detecting means carried by said common support substrate and operably connected to respective ones of said elements to provide electrical signals thereto for detecting selected ones of said light beams as reflected by said holographic reflective surface and providing associated electrical signals derived from said reflected light beams.

Claim 25

The computer of claim 21 and additionally comprising: means for switching said light source means on and off to determine which ones of said light detecting means receive said reflected light beams whereby the sequence of said elements receiving and processing said signals is determined.

Claim 26

The computer of claim 21 and additionally comprising: light modulation means disposed between said light source means and said light detecting means selectively blocking and passing said light beams whereby the sequence of said elements receiving and processing said signals is determined.

Claim 27

The computer of claim 23 wherein: said light modulation means is disposed adjacent said reflective surface of said holographic optical element.

Claim 28

The computer of claim 20 wherein said means for transmitting and switching signals to said elements optically comprises: a) a reconfigurable holographic optical element including a holographic reflective surface mounted adjacent and parallel to said common support substrate and light modulation means disposed adjacent said holographic reflective surface for selectively blocking and passing light beams from reflecting from said holographic reflective surface at individual pixel positions thereof; b) a plurality of light source means carried by said common support substrate for directing signal-modified light beams towards said holographic reflective surface to be reflected thereby back towards said common support substrate; c) a plurality of light detecting means carried by said common support substrate and operably connected to respective ones of said elements to provide electrical signals thereto for detecting selected ones of said light beams as reflected by said holographic reflective surface and providing associated electrical signals derived from said reflected light beams to said elements; and, d) means for switching said light modulation means on and off at said individual pixel positions thereof to determine which ones of said light detecting means receive said reflected light beams whereby the sequence of said elements receiving and processing said signals is determined.

Claim 29

An optically intraconnected computer comprising: a) a memory for holding a sequence of instructions to be executed; b) logic for accessing said instructions in sequence; c) logic for determining for each said instruction the function to be performed and the effective address thereof; d) a plurality of individual elements on a common support substrate optimized to perform certain logical sequences employed in executing said instructions; and, e) element selection logic means connected to said logic determining the function to be performed for each said instruction for determining the class of each function and for causing the instruction to be executed by those said elements which perform those associated said logical sequences affecting the instruction execution in an optimum manner, said element selection logic means including means for transmitting and switching signals to said elements optically comprising, e1) a holographic optical element including a holographic reflective surface mounted adjacent and parallel to said common support substrate; e2) a plurality of light source means carried by said common support substrate for directing signal-modified light beams towards said holographic reflective surface to be reflected thereby back towards said common support substrate; and, e3) a plurality of light detecting means carried by said common support substrate and operably connected to respective ones of said elements to provide electrical signals thereto for detecting selected ones of said light beams as reflected by said holographic reflective surface and providing associated electrical signals derived from said reflected light beams to said elements.

Claim 30

An optically intraconnected computer comprising: a) a memory for holding a sequence of instructions to be executed; b) logic for accessing said instructions in sequence; c) logic for determining for each said instruction the function to be performed and the effective address thereof; d) a plurality of individual elements on a common support substrate optimized to perform certain logical sequences employed in executing said instructions; and, e) element selection logic means connected to said logic determining the function to be performed for each said instruction for determining the class of each function and for causing the instruction to be executed by those said elements which perform those associated said logical sequences affecting the instruction execution in an optimum manner, said element selection logic means including means for transmitting and switching signals to said elements optically comprising, e1) a holographic optical element including a holographic reflective surface mounted adjacent and parallel to said common support substrate; e2) a plurality of light source means carried by said common support substrate for directing signal-modified light beams towards said holographic reflective surface to be reflected thereby back towards said common support substrate; and, e3) a plurality of light detecting means carried by said common support substrate and operably connected to respective ones of said elements to provide electrical signals thereto for detecting selected ones of said light beams as reflected by said holographic reflective surface and providing associated electrical signals derived from said reflected light beams to said elements.

Claim 31

The optically intraconnected computer of claim 26 wherein: said element selection logic means additionally includes means for accepting dynamic inputs designating changes in the operating environment of the optically intraconnected computer and means for changing the ones of said elements which execute each instruction whereby instruction execution is affected in an optimum manner for the present dynamic conditions.

Claim 32

The optically intraconnected computer of claim 26 wherein: said elements comprise individual arithmetic and logic units contained on a single central processor unit chip.

Claim 33

The optically intraconnected computer of claim 26 wherein: said elements comprise individual reduced instruction set computers contained on a single central processor unit chip.

Claim 34

The optically intraconnected computer of claim 26 and additionally comprising: means for switching said light source means on and off to determine which ones of said light detecting means received said reflected light beams whereby the sequence of said elements receiving and processing said signals is determined.

Claim 35

The optically intraconnected computer of claim 26 and additionally comprising: light modulation means disposed between said light source means and said light detecting means for selectively blocking and passing said light beams whereby the sequence of said elements receiving and processing said signals is determined.

Claim 36

The optically intraconnected computer of claim 31 wherein: said light modulation means is disposed adjacent said reflective surface of said holographic optical element.

Claim 37

The optically intraconnected computer of claim 26 wherein: a) said holographic optical element of said means for transmitting and switching signals to said elements optically comprises a reconfigurable holographic optical element including a holographic reflective surface mounted adjacent and parallel to said common support substrate and light modulation means disposed adjacent said holographic reflective surface for selectively blocking and passing light beams from reflecting from said holographic reflective surface at individual pixel positions thereof; and additionally comprising, b) means for switching said light modulation means on and off at said individual pixel positions thereof to determine which ones of said light detecting means receive said reflected light beams whereby the sequence of said elements receiving and processing said signals is determined.

Claim 38

In a computer including a memory for holding a sequence of instructions to be executed, logic for accessing the instructions in sequence, logic for determining for each instruction a function to be performed and an effective address thereof, and logic for executing each instruction, the improvement wherein: a) the logic for executing instructions comprises: a plurality of individual elements on a common support substrate optimized to perform certain logical sequences employed in executing instruction; and b) the computer comprises: element selection logic means connected to the logic determining the function to be performed for each instruction for determining a class of each function and for causing the instruction to be executed by those of said elements which perform those of said logical sequences affecting the instruction execution in an optimum manner, said element selection logic means including means for accepting dynamic inputs designating changes in an operating environment of the computer and means for changing the ones of said elements which execute each instruction as a function of said dynamic inputs whereby instruction execution is affected in an optimum manner for the present dynamic conditions.

Claim 39

In a computer including a memory for holding a sequence of instructions to be executed, logic for accessing the instructions in sequence, logic for determining for each instruction a function to be performed and an effective address thereof, and logic for executing each instruction, the improvement wherein: a) the logic for executing instructions comprises: a plurality of individual elements on a common support substrate optimized to perform certain logical sequences employed in executing instruction; and b) the computer comprises: element selection logic means connected to the logic determining the function to be performed for each instruction for determining a class of each function and for causing the instruction to be executed by those of said elements which perform those of said logical sequences affecting the instruction execution in an optimum manner, said element selection logic means including means for accepting dynamic inputs designating changes in an operating environment of the computer and means for changing the ones of said elements which execute each instruction as a function of said dynamic inputs whereby instruction execution is affected in an optimum manner for the present dynamic conditions.

Claim 40

A computer comprising: (a) a memory for holding a sequence of instructions to be executed; (b) logic for accessing said instructions in sequence; (c) logic for determining for each said instruction a function to be performed and an effective address thereof; (d) a plurality of individual elements on a common support substrate optimized to perform certain logical sequences employed in executing said instructions; and, (e) element selection logic means connected to said logic determining the function to be performed for each said instruction for determining a class of each function and for causing the instruction to be executed by those said elements which perform those associated said logical sequences affecting the instruction execution in an optimum manner, said element selection logic means including means for accepting dynamic inputs designating changes in the operating environment of the computer and means for changing the ones of said elements which execute each instruction as a function of said dynamic inputs whereby instruction execution is affected in an optimum manner for the present dynamic conditions.

Claim 41

A computer comprising: (a) a memory for holding a sequence of instructions to be executed; (b) logic for accessing said instructions in sequence; (c) logic for determining for each said instruction a function to be performed and an effective address thereof; (d) a plurality of individual elements on a common support substrate optimized to perform certain logical sequences employed in executing said instructions; and, (e) element selection logic means connected to said logic determining the function to be performed for each said instruction for determining a class of each function and for causing the instruction to be executed by those said elements which perform those associated said logical sequences affecting the instruction execution in an optimum manner, said element selection logic means including means for accepting dynamic inputs designating changes in the operating environment of the computer and means for changing the ones of said elements which execute each instruction as a function of said dynamic inputs whereby instruction execution is affected in an optimum manner for the present dynamic conditions.