Amplifier having polygonal-line characteristics employing two comparators

Claim 2

A polygonal-line characteristic amplifier comprising: a signal input terminal and a signal output terminal; a minimum-voltage discrimination circuit for detecting and outputting a lower one of two input voltages respectively applied to two non-inverting input terminals of said minimum-voltage discrimination circuit, one of said non-inverting input terminals being supplied with an input voltage applied to said signal input terminal and the other of said non-inverting input terminals being supplied with a predetermined reference voltage; and a maximum-voltage discrimination circuit for detecting and outputting a higher one of two input voltages respectively applied to two non-inverting input terminals of said maximum-voltage discrimination circuit, one of said two non-inverting input terminals of said maximum-voltage discrimination circuit being supplied with the output from said minimum-voltage discrimination circuit, whereby a polygonal-line characteristic voltage corresponding to an input voltage applied to said signal input terminal is outputted from said signal output terminal.

Claim 3

A polygonal-line characteristic amplifier according to claim 1, further comprising a voltage dividing circuit for producing a divided voltage of said input voltage, formed by two resistors connected in series between said signal input terminal and the ground, said divided voltage being inputted to the other of said two non-inverting input terminals of said maximum-voltage discrimination circuit.

Claim 4

A polygonal-line characteristic amplifier according to claim 1, in which: said minimum-voltage discrimination circuit has a voltage gain of A Vmin and outputs an amplified lower one of said two input voltages respectively applied to said two non-inverting input terminals thereof; and said maximum-voltage discrimination circuit has a voltage gain of "1" and receives directly said input voltage at the other one of said two non-inverting input terminals thereof.

Claim 5

A polygonal-line characteristic amplifier comprising: a signal input terminal and a signal output terminal; a minimum-voltage discrimination circuit having a differential circuit configuration and having an inverting input terminal, a pair of non-inverting input terminals and an output terminal, said inverting input terminal being connected to said output terminal, one of said non-inverting input terminals being supplied with an input voltage applied to said signal input terminal, and the other non-inverting input terminal being supplied with a predetermined reference voltage; and a maximum-voltage discrimination circuit having a differential circuit configuration and having an inverting input terminal, a pair of non-inverting input terminals and an output terminal, said inverting input terminal and said output terminal of said maximum-voltage discrimination circuit being connected to each other, one of said non-inverting input terminals of said maximum-voltage discrimination circuit being connected to said output terminal of said minimum-voltage discrimination circuit, and the other non-inverting input terminal of said maximum-voltage discrimination circuit being supplied with a resistor divided voltage of said input voltage. whereby said maximum-voltage discrimination circuit outputs from its output terminal a polygonal-line characteristic voltage corresponding to said input voltage.

Claim 6

A polygonal-line characteristic amplifier comprising: a signal input terminal and a signal output terminal; a minimum-voltage discrimination circuit having a differential circuit configuration and having an inverting input terminal, a pair of non-inverting input terminals and an output terminal, said inverting input terminal being connected to said output terminal, one of said non-inverting input terminals being supplied with an input voltage applied to said signal input terminal, and the other non-inverting input terminal being supplied with a predetermined reference voltage; and a maximum-voltage discrimination circuit having a differential circuit configuration and having an inverting input terminal, a pair of non-inverting input terminals and an output terminal, said inverting input terminal and said output terminal of said maximum-voltage discrimination circuit being connected to each other, one of said non-inverting input terminals of said maximum-voltage discrimination circuit being connected to said output terminal of said minimum-voltage discrimination circuit, and the other non-inverting input terminal of said maximum-voltage discrimination circuit being supplied with a resistor divided voltage of said input voltage. whereby said maximum-voltage discrimination circuit outputs from its output terminal a polygonal-line characteristic voltage corresponding to said input voltage.

Claim 7

A polygonal-line characteristic amplifier according to claim 4, in which a series connection of a pair of resistors is connected between said signal input terminal to which said input voltage is externally applied and the ground so that said resistor divided voltage is obtained from a junction point between said pair of resistors.

Claim 8

A polygonal-line characteristic amplifier according to claim 4, in which: said minimum-voltage discrimination circuit is constituted by a first transistor, a second transistor, a third transistor, a first inversion buffer amplifier, a first current-mirror circuit and a first constant-current source, respective emitters of said first, second and third transistors being commonly connected to said first constant-current source, a base of said first transistor being supplied with said predetermined reference voltage, a base of said second transistor being supplied with said input voltage applied to said signal input terminal, collectors of said first and second transistors being commonly connected to an output terminal of said first current-mirror circuit and to an inverted input terminal of said first inversion buffer amplifier, a collector of said third transistor being connected to an inverted input terminal of said first current-mirror circuit, a base of said third transistor being connected to an output terminal of said first inversion buffer amplifier so as to act as said output terminal of said minimum-voltage discrimination circuit; and said maximum-voltage discrimination circuit is constituted by a fourth transistor, a fifth transistor, a sixth transistor, a second inversion buffer amplifier, a second current-mirror circuit and a second constant-current source, respective emitters of said fourth, fifth and sixth transistors being commonly connected to said second constant-current source, a base of said fourth transistor being connected to said output terminal of said minimum-voltage discrimination circuit, a base of said fifth transistor being supplied with said resistor divided voltage, collectors of said fourth and fifth transistors being commonly connected to an output terminal of said second current-mirror circuit and also to an inverted input terminal of said second inversion buffer amplifier, a collector of said sixth transistor being connected to an inverted input terminal of said second current-mirror circuit, a base of said sixth transistor being connected to an output terminal of said second inversion buffer amplifier so as to act as said output terminal of said maximum-voltage discrimination circuit.

Claim 9

A polygonal-line characteristic amplifier according to claim 6, in which said first to third transistors in said minimum-voltage discrimination circuit are all of a PNP-type and said fourth to sixth transistors in said maximum-voltage discrimination circuit are all of an NPN-type.

Claim 10

A polygonal-line characteristic amplifier according to claim 1, in which said minimum-voltage discrimination circuit is constituted by a resistor, an NPN-transistor, a PNP-transistor, a constant-current source, a base of said NPN-transistor being supplied with said predetermined reference voltage, a collector of said NPN-transistor being connected to an external positive voltage source, an emitter of said NPN-transistor being connected to a base of said PNP-transistor and to said constant-current source, a collector of said PNP-transistor being connected to the ground, an emitter of said PNP-transistor being coupled to said signal input terminal through said resistor, said emitter of said PNP-transistor acting as said output terminal of said minimum-voltage discrimination circuit.

Claim 11

A polygonal-line characteristic amplifier comprising: a signal input terminal and a signal output terminal; a minimum-voltage discrimination circuit having a differential circuit configuration and having an inverting input terminal, a pair of non-inverting input terminals and an output terminal, said inverting input terminal being connected to said output terminal through a first resistor and to the ground through a second resistor, one of said non-inverting input terminals being supplied with an input voltage applied to said signal input terminal, and the other non-inverting input terminal being supplied with a predetermined reference voltage; and a maximum-voltage discrimination circuit having a differential circuit configuration and having an inverting input terminal, a pair of non-inverting input terminals and an output terminal, said inverting input terminal and said output terminal of said maximum-voltage discrimination circuit being connected to each other, one of said non-inverting input terminals of said maximum-voltage discrimination circuit being connected to said output terminal of said minimum-voltage discrimination circuit, and the other non-inverting input terminal of said maximum-voltage discrimination circuit being supplied with said input voltage applied to said signal input terminal. whereby said maximum-voltage discrimination circuit outputs from its output terminal a polygonal-line characteristic voltage corresponding to said input voltage.

Claim 12

A polygonal-line characteristic amplifier comprising: a signal input terminal and a signal output terminal; a minimum-voltage discrimination circuit having a differential circuit configuration and having an inverting input terminal, a pair of non-inverting input terminals and an output terminal, said inverting input terminal being connected to said output terminal through a first resistor and to the ground through a second resistor, one of said non-inverting input terminals being supplied with an input voltage applied to said signal input terminal, and the other non-inverting input terminal being supplied with a predetermined reference voltage; and a maximum-voltage discrimination circuit having a differential circuit configuration and having an inverting input terminal, a pair of non-inverting input terminals and an output terminal, said inverting input terminal and said output terminal of said maximum-voltage discrimination circuit being connected to each other, one of said non-inverting input terminals of said maximum-voltage discrimination circuit being connected to said output terminal of said minimum-voltage discrimination circuit, and the other non-inverting input terminal of said maximum-voltage discrimination circuit being supplied with said input voltage applied to said signal input terminal. whereby said maximum-voltage discrimination circuit outputs from its output terminal a polygonal-line characteristic voltage corresponding to said input voltage.