US5113189A
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Frequency translating coherent analog to digital conversion system for modulated signals
Assignee: NXP USA Inc
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Filing: 1991-06-21
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Granted: 1992-05-12
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Expires: 2011-06-21
Abstract
Abstract A analog to digital (A/D) conversion system (10 or 20) receives a modulated analog signal, translates the frequency of the signal to a lower frequency, and converts the analog signal to a filtered digital signal. In one form, the conversion system (10) has an analog signal multiplier (16), and A/D converter (18), an oscillator (12) and a frequency divider (14). Frequency multiplier (16) translates the frequency of the analog signal, and A/D converter (18) converts the analog signal to digital form. Frequency divider (14) receives a clock signal from oscillator (12) and divides the frequency of the clock signal. Because the same clock signal is used for frequency translation and analog to digital conversion, a phase error is not introduced in the output digital signal. Additionally, the frequency divider (14) forces the frequencies of the analog and digital signals to be an integer ratio for subsequent demodulation.
Inventors
- 👤 Dion D. Messer
- 👤 Sangil Park
- 👤 Charles D. Thompson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 06:46
CPC Classifications
H; H03; H03M; H03M3/00; H03M3/30; H03M3/322; H03M3/324; H03M1/00; H03M1/12; H03M3/368; H03M3/37; H03M3/458
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
160 words
A frequency translating coherent analog to digital conversion system for modulated signals, comprising: an analog signal multiplier having a first input for receiving a modulated input signal, a second input for receiving a down conversion reference frequency signal, and an output for providing an intermediate frequency signal; an oversampling analog to digital converter having an input for receiving the intermediate frequency signal at a predetermined center frequency, a clock input for receiving a reference clock signal, and an output for providing a filtered output digital signal at a predetermined sampling frequency; a reference clock means coupled to the clock input of the oversampling analog to digital converter for providing the reference clock signal; and a frequency divider having an input connected to the reference clock signal, the frequency divider dividing the reference clock signal by a predetermined divisor and having an output connected to the second input of the analog signal multiplier for providing the down conversion reference frequency signal.
Claim 2
Dependent Claim
160 words
A frequency translating coherent analog to digital conversion system for modulated signals, comprising: an analog signal multiplier having a first input for receiving a modulated input signal, a second input for receiving a down conversion reference frequency signal, and an output for providing an intermediate frequency signal; an oversampling analog to digital converter having an input for receiving the intermediate frequency signal at a predetermined center frequency, a clock input for receiving a reference clock signal, and an output for providing a filtered output digital signal at a predetermined sampling frequency; a reference clock means coupled to the clock input of the oversampling analog to digital converter for providing the reference clock signal; and a frequency divider having an input connected to the reference clock signal, the frequency divider dividing the reference clock signal by a predetermined divisor and having an output connected to the second input of the analog signal multiplier for providing the down conversion reference frequency signal.
Claim 3
Dependent Claim
44 words
The frequency translating coherent analog to digital conversion system of claim 1 wherein the oversampling analog to digital converter provides a filtered output sampled signal having a sampling frequency which is a predetermined integer multiple of the center frequency of the intermediate frequency signal.
Claim 4
Dependent Claim
22 words
The frequency translating coherent analog to digital conversion system of claim 2 wherein the predetermined integer multiple is a multiple of two.
Claim 5
Dependent Claim
26 words
The frequency translating coherent analog to digital conversion system of claim 1 wherein the oversampling analog to digital converter is a sigma-delta analog to digital converter.
Claim 6
Dependent Claim
25 words
The frequency translating coherent analog to digital conversion system of claim 1 wherein the frequency divider divides the reference clock signal by an integer divisor.
Claim 7
Dependent Claim
33 words
The frequency translating coherent analog to digital conversion system of claim 1 wherein the intermediate frequency provided by the analog signal multiplier is less than the center frequency of the modulated input signal.
Claim 8
Independent Claim
167 words
A method for providing a coherent analog to digital conversion of modulated input signals, comprising the steps of: providing an analog signal multiplier having a first input for receiving a modulated input signal, a second input for receiving a down conversion reference frequency signal, and an output for providing an intermediate frequency signal; providing an oversampling analog to digital converter having an input for receiving the intermediate frequency signal at a predetermined center frequency, a clock input for receiving a reference clock signal, and an output for providing a filtered output digital signal at a predetermined sampling frequency; coupling a reference clock means to the clock input of the oversampling analog to digital converter to provide the reference clock signal; and connecting an input of a frequency divider to the reference clock signal, the frequency divider dividing the reference clock signal by a predetermined divisor and having an output connected to the second input of the analog signal multiplier for providing the down conversion reference frequency signal.
Claim 9
Independent Claim
167 words
A method for providing a coherent analog to digital conversion of modulated input signals, comprising the steps of: providing an analog signal multiplier having a first input for receiving a modulated input signal, a second input for receiving a down conversion reference frequency signal, and an output for providing an intermediate frequency signal; providing an oversampling analog to digital converter having an input for receiving the intermediate frequency signal at a predetermined center frequency, a clock input for receiving a reference clock signal, and an output for providing a filtered output digital signal at a predetermined sampling frequency; coupling a reference clock means to the clock input of the oversampling analog to digital converter to provide the reference clock signal; and connecting an input of a frequency divider to the reference clock signal, the frequency divider dividing the reference clock signal by a predetermined divisor and having an output connected to the second input of the analog signal multiplier for providing the down conversion reference frequency signal.
Claim 10
Dependent Claim
29 words
The method of claim 7 wherein the reference clock means provides a reference clock signal having a frequency which is a predetermined integer multiple of the intermediate frequency signal.
Claim 11
Dependent Claim
19 words
The method of claim 7 wherein the oversampling analog to digital converter is a sigma-delta analog to digital converter.
Claim 12
Dependent Claim
147 words
A frequency translating coherent analog to digital conversion system for modulated signals, comprising: an analog signal multiplier having a first input for receiving a modulated input signal, a second input for receiving a reference clock signal, and an output for providing an intermediate frequency signal; an analog to digital converter having a first input for receiving the intermediate frequency, a second input for receiving a down conversion reference frequency, and an output for providing a filtered output sampled signal at a predetermined frequency; a reference clock means coupled to the second input of the analog signal multiplier for providing the reference clock signal; and a frequency divider having an input coupled to the reference clock signal, the frequency divider dividing the reference clock signal by a predetermined divisor and having an output coupled to the analog to digital converter for providing the down conversion reference frequency signal.
Claim 13
Dependent Claim
147 words
A frequency translating coherent analog to digital conversion system for modulated signals, comprising: an analog signal multiplier having a first input for receiving a modulated input signal, a second input for receiving a reference clock signal, and an output for providing an intermediate frequency signal; an analog to digital converter having a first input for receiving the intermediate frequency, a second input for receiving a down conversion reference frequency, and an output for providing a filtered output sampled signal at a predetermined frequency; a reference clock means coupled to the second input of the analog signal multiplier for providing the reference clock signal; and a frequency divider having an input coupled to the reference clock signal, the frequency divider dividing the reference clock signal by a predetermined divisor and having an output coupled to the analog to digital converter for providing the down conversion reference frequency signal.
Claim 14
Dependent Claim
38 words
The analog to digital conversion system of claim 10 wherein the analog to digital converter provides a filtered output sampled signal at a frequency which is a predetermined integer multiple of a frequency of the intermediate frequency signal.
Claim 15
Dependent Claim
19 words
The analog to digital conversion system of claim 11 wherein the predetermined integer multiple is a multiple of two.
Claim 16
Dependent Claim
23 words
The analog to digital conversion system of claim 10 wherein the analog to digital converter is a Nyquist rate analog to digital converter.
Claim 17
Dependent Claim
22 words
The analog to digital conversion system of claim 10 wherein the frequency divider divides the reference clock signal by an integer divisor.
Claim 18
Dependent Claim
29 words
The analog to digital conversion system of claim 10 wherein the intermediate frequency provided by the analog signal multiplier is less than the frequency of the modulated input signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-05-12 | 1995-11-11 | 1996-05-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-05-12 | 1999-11-11 | 2000-05-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-05-12 | 2003-11-11 | 2004-05-12 | $7700.00 | Window Closed / Lapsed |