Semiconductor integrated circuit with circuit blocks, dummy islands, and bias and shield electrodes

Claim 1

A semiconductor integrated circuit comprising: a p type semiconductor substrate, an n type epitaxial layer formed on said substrate, p + type isolation regions penetrating said epitaxial layer to form a plurality of island regions and at least one dummy island between said island regions, semiconductor circuit elements formed in said island regions, a plurality of circuit blocks which include said circuit elements, at least a first circuit block of said circuit blocks being surrounded by said dummy island, a reverse bias electrode for applying a predetermined reverse bias potential to said dummy island, a shield electrode covering said first circuit block and connected to said reverse bias electrode, said reverse bias electrode being connected to said dummy island through an opening of a first insulating layer, said shield electrode being connected to said reverse bias electrode through an opening in a second insulating layer, and a conductor led into and out of said first circuit block extends through a cut portion of said reverse bias electrode between said first and second insulating layers.