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US5109523A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for determining whether data signals of a first set are related to data signal of a second set

Assignee: Hitachi Ltd
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Filing: 1990-02-15
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Granted: 1992-04-28
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Expires: 2010-02-15
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Abstract

Abstract A method for controlling a vector processor so as to detect whether or not a value of each data signal among a first set of data signals has a specific relation with a value of one of a second set of data signals. The vector processor includes an operation unit for performing an arithmetical or logical operation in a pipeline manner on vector data. First and second vector data are formed each including groups of data signals related to the first and second set of data signals. The operation of the operation unit is controlled such that the operation unit detects whether or not a value of each data signal of the first vector data has a specific relation with a value of a corresponding data signal of the second vector data. Third vector data including result data signals is generated thereby which indicate the result of the operation.

Inventors

  • 👤 Yasusi Kanada
  • 👤 Shunichi Torii
  • 👤 Keiji Kojima

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 02:21
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/44; G06F9/448; G06F9/4496

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 371 words
A method for controlling a vector processor so as to detect whether or not a value of each data signal among a first set of data signals has a specific relation with a value of one of a second set of data signals, the vector processor including an operation unit for performing an arithmetical or logical operation in a pipelined manner on vector data, the method comprising the steps of: (a) forming, from the first set of data signals, first vector comprised of groups of data signals, wherein said groups respectively correspond to different data signals of said first set of data signals, and data signals of each group are all equal to one data signal to which said each group corresponds among said data signals belonging to said first set of data signals and a total number of data signals of said each group is equal to a total number of data signals belonging to said second set of data signals; (b) forming, from said second set of data signals, second vector data comprised of groups of data signals, wherein data signals in each group are respectively equal to the data signals belonging to the second set of data signals and the number of the groups is equal to the number of data signals belonging to the first set of data signals; and (c) controlling the operation of said operation unit so that said operation unit determines whether or not a value of each data signal of the first vector data has a specific relation with a value of a corresponding data signal of the second vector data which is equal in vector element number to said each data signal of the first vector data thereby causing said operation unit to prvide third vector data including result data signals each indicative of a result of the determination for a pair of data signals including a data signal of the first vector data and a corresponding data signal of the second vector data; and (d) detecting, in response to the result data signals included in the third vector vector which one of the first set of data signals has a specific relation to one of the second set of data signals.
Claim 2
Independent Claim 371 words
A method for controlling a vector processor so as to detect whether or not a value of each data signal among a first set of data signals has a specific relation with a value of one of a second set of data signals, the vector processor including an operation unit for performing an arithmetical or logical operation in a pipelined manner on vector data, the method comprising the steps of: (a) forming, from the first set of data signals, first vector comprised of groups of data signals, wherein said groups respectively correspond to different data signals of said first set of data signals, and data signals of each group are all equal to one data signal to which said each group corresponds among said data signals belonging to said first set of data signals and a total number of data signals of said each group is equal to a total number of data signals belonging to said second set of data signals; (b) forming, from said second set of data signals, second vector data comprised of groups of data signals, wherein data signals in each group are respectively equal to the data signals belonging to the second set of data signals and the number of the groups is equal to the number of data signals belonging to the first set of data signals; and (c) controlling the operation of said operation unit so that said operation unit determines whether or not a value of each data signal of the first vector data has a specific relation with a value of a corresponding data signal of the second vector data which is equal in vector element number to said each data signal of the first vector data thereby causing said operation unit to prvide third vector data including result data signals each indicative of a result of the determination for a pair of data signals including a data signal of the first vector data and a corresponding data signal of the second vector data; and (d) detecting, in response to the result data signals included in the third vector vector which one of the first set of data signals has a specific relation to one of the second set of data signals.
Claim 3
Dependent Claim 96 words
A method for controlling a vector processor according to claim 1, wherein the step (d) comprises the steps of: (d1) forming fourth vector data which includes as elements thereof a part of the data signals belonging to the first vector data, depending upon whether corresponding result data signals of the third vector data have a predetermined value; and (d2) forming fifth vector data which includes as elements thereof a part of the data signals belonging to the second vector data, depending upon whether corresponding result data signals of the third vector data have the predetermined value.
Claim 4
Dependent Claim 119 words
A method for controlling a vector processor according to claim 1, further comprising the steps of: forming the first and second vector data on a main storage of said vector processor and then transferring them to first and second ones of a plurality of vector registers provided in said vector processor wherein the operation by said operation unit is done on the first and second vector data held by the first and second vector registers; transferring the third vector data provided by said operation unit to a vector mask register provided in said vector processor; and gathering the fourth and fifth vector data on said main storage based upon the third vector data held by the vector mask register.
Claim 5
Independent Claim 348 words
A method for controlling a vector processor so as to detect whether a value of each data signal among a first set of data signals has a specific relation with a value of one of a second set of data signals by performing an arithmetic or logical operation on a respective one of data signals belonging to a first set of data signals and a respective one of data signals belonging to a second set of data signals, the vector processor including an operation unit for performing said arithmetic or logical operation in a pipelined manner on vector data, the method comprising the steps of: (a) forming, from said first set of data signals, first vector data comprised of groups of data signals, wherein said groups respectively correspond to different data signals of said first set of data signals and data signals of a respective one of the groups are all equal to one data signal to which the one group corresponds among said data signals belonging to said first set and a total number of data signals of a respective group is equal to a total number of data signals of the second set of data signals; (b) forming, from said second set of data signals, second vector data comprised of groups of data signals, wherein data signals in each of the groups of the second vector data are respectively equal to said data signals belonging to said second set of data signals and a total number of the groups is equal to a total number of data signals belonging to the first set of data signals; and (c) controlling the operation of said operation unit so that said operation unit performs an arithmetical or logical operation on paris of data signals each including a data signal of the first vector data and a corresponding data signal of the second vector data, thereby causing said operation unit to provide third vector data comprising result data signals for detecting whether a pair of data data signals which have received the operation has a specific relation with each other.
Claim 6
Independent Claim 348 words
A method for controlling a vector processor so as to detect whether a value of each data signal among a first set of data signals has a specific relation with a value of one of a second set of data signals by performing an arithmetic or logical operation on a respective one of data signals belonging to a first set of data signals and a respective one of data signals belonging to a second set of data signals, the vector processor including an operation unit for performing said arithmetic or logical operation in a pipelined manner on vector data, the method comprising the steps of: (a) forming, from said first set of data signals, first vector data comprised of groups of data signals, wherein said groups respectively correspond to different data signals of said first set of data signals and data signals of a respective one of the groups are all equal to one data signal to which the one group corresponds among said data signals belonging to said first set and a total number of data signals of a respective group is equal to a total number of data signals of the second set of data signals; (b) forming, from said second set of data signals, second vector data comprised of groups of data signals, wherein data signals in each of the groups of the second vector data are respectively equal to said data signals belonging to said second set of data signals and a total number of the groups is equal to a total number of data signals belonging to the first set of data signals; and (c) controlling the operation of said operation unit so that said operation unit performs an arithmetical or logical operation on paris of data signals each including a data signal of the first vector data and a corresponding data signal of the second vector data, thereby causing said operation unit to provide third vector data comprising result data signals for detecting whether a pair of data data signals which have received the operation has a specific relation with each other.

References Cited (Backward Citations)

US3930231A Cited
US4525796A Cited
US4621324A Cited
US4661900A Cited
US4630192A Cited
US4589067A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-04-28 1995-10-28 1996-04-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-04-28 1999-10-28 2000-04-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-04-28 2003-10-28 2004-04-28 $7700.00 Window Closed / Lapsed

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