US5107207A
Expired / Lapsed
US
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Method and an apparatus for testing AC characteristics of an integrated circuit
Assignee: Toshiba Corp
•
Filing: 1989-12-18
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Granted: 1992-04-21
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Expires: 2009-12-18
Abstract
Abstract A method of inspecting an integrated circuit comprises the steps of supplying an alternating signal to a plurality of different circuits in the integrated circuit, and measuring a signal corresponding to the alternating signal, which is output from each of the circuits.
Inventors
- 👤 Kazumasa Noyori
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 08:56
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/316
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
70 words
A method of inspecting an integrated circuit comprising the steps of: supplying an alternating signal to a plurality of different circuits in said integrated circuit, said alternating signal being supplied to a computer means and compensated therein, wherein a defect of said integrated circuit is detected by the value of the compensation; and measuring an output signal corresponding to said alternating signal, which is output from each of said circuits.
Claim 2
Independent Claim
70 words
A method of inspecting an integrated circuit comprising the steps of: supplying an alternating signal to a plurality of different circuits in said integrated circuit, said alternating signal being supplied to a computer means and compensated therein, wherein a defect of said integrated circuit is detected by the value of the compensation; and measuring an output signal corresponding to said alternating signal, which is output from each of said circuits.
Claim 3
Dependent Claim
20 words
A method of inspecting an integrated circuit according to claim 1, wherein said alternating signal includes a continuous sine wave.
Claim 4
Dependent Claim
23 words
A method of inspecting an integrated circuit according to claim 1, wherein said alternating signal is supplied to each of said circuits simultaneously.
Claim 5
Dependent Claim
24 words
A method of inspecting an integrated circuit according to claim 1, wherein each of said output signals output from said circuits is measured simultaneously.
Claim 6
Dependent Claim
27 words
A method of inspecting an integrated circuit according to claim 1, wherein an input/output characteristic of the gain of said circuit is measured in said measuring step.
Claim 7
Dependent Claim
24 words
A method of inspecting an integrated circuit according to claim 1, wherein a frequency characteristic of said circuit is measured in said measuring step.
Claim 8
Dependent Claim
24 words
A method of inspecting an integrated circuit according to claim 1, wherein a logic signal of said circuit is measured in said measuring step.
Claim 9
Dependent Claim
25 words
A method of inspecting an integrated circuit according to claim 1, wherein a relative harmonic content of said circuit is measured in said measuring step.
Claim 10
Dependent Claim
23 words
A method of inspecting an integrated circuit according to claim 1, wherein a phase of said circuit is measured in said measuring step.
Claim 11
Dependent Claim
19 words
A method of inspecting an integrated circuit according to claim 1, wherein said alternating signal includes a square wave.
Claim 12
Independent Claim
125 words
An apparatus for testing an integrated circuit comprising: alternating signal generator means for supplying a pulse to said integrated circuit; a plurality of relays connected to said alternating signal generator means; an A/D converter connected to said plurality of relays; computer means, connected to said alternating signal generator means, to said relays, and to said A/D converter, for activating said alternating signal generator means and said relays and for measuring a signal output from said A/D convertor; an attenuator circuit connected to said alternating signal generator means; a buffer circuit connected to said attenuator circuit; and a radio frequency voltmeter connected at one end to said buffer circuit and said relays, at the other end to said alternating signal generator means, thereby forming a loop.
Claim 13
Independent Claim
125 words
An apparatus for testing an integrated circuit comprising: alternating signal generator means for supplying a pulse to said integrated circuit; a plurality of relays connected to said alternating signal generator means; an A/D converter connected to said plurality of relays; computer means, connected to said alternating signal generator means, to said relays, and to said A/D converter, for activating said alternating signal generator means and said relays and for measuring a signal output from said A/D convertor; an attenuator circuit connected to said alternating signal generator means; a buffer circuit connected to said attenuator circuit; and a radio frequency voltmeter connected at one end to said buffer circuit and said relays, at the other end to said alternating signal generator means, thereby forming a loop.
Claim 14
Dependent Claim
30 words
An apparatus for testing an integrated circuit according to claim 11, wherein said alternating signal generator means supplies an alternating signal to a plurality of circuits in said integrated circuit.
Claim 15
Dependent Claim
39 words
An apparatus for testing an integrated circuit according to claim 11, further comprising a second A/D converter connected at one end to said alternating signal generator means, at the other end to said computer means, thereby forming a loop.
Claim 16
Dependent Claim
30 words
An apparatus for testing an integrated circuit according to claim 11, further comprising filter means, connected between said alternating signal generator means and said relay, for correcting said alternating signal.
Claim 17
Dependent Claim
45 words
An apparatus for testing an integrated circuit according to claim 11, further comprising: an attenuator circuit means, connected to said alternating signal generator means, for attenuating said alternating signal; and a buffer circuit means, connected to said attenuator circuit means, for compensating said alternating signal.
Claim 18
Dependent Claim
28 words
An apparatus for testing an integrated circuit according to claim 11, further comprising: a reference generator means for supplying a reference signal to said alternating signal generator means.
Claim 19
Dependent Claim
26 words
An apparatus for testing an integrated circuit according to claim 11, wherein said signal generator means is replaced by a plurality of alternating signal generator means.
Claim 20
Dependent Claim
100 words
An apparatus for testing an integrated circuit according to claim 11, wherein said computer means includes storage means for storing program, said storage means including the following program for executing a first test: operating the relay in accordance with the measuring conditions of the first test; instructing said alternating signal generator means to supply a signal to a circuit incorporated in the IC; and measuring the signal output from the circuit incorporated in the IC, comparing the measured value with the predetermined value in accordance with the measuring conditions of the first test, and judging the quality of the IC.
Claim 21
Dependent Claim
33 words
An apparatus for testing an integrated circuit according to claim 18, wherein a plurality of circuits are included in said IC, a plurality of signals are supplied, and said signals are supplied simultaneously.
Claim 22
Dependent Claim
39 words
An apparatus for testing an integrated circuit according to claim 18, wherein a plurality of signals are output from the circuits incorporated in said IC, and said output signals are input to said computer means simultaneously, and processed therein.
Claim 23
Dependent Claim
45 words
An apparatus for testing an integrated circuit according to claim 18, wherein said storage means includes a program of setting an adjusting value measured beforehand in accordance with the type of said IC and the kind of the test to said alternating signal generator means.
Claim 24
Dependent Claim
102 words
An apparatus for testing an integrated circuit according to claim 18, wherein said storage means includes the following programs for further executing a second test: operating the relay in accordance with the measuring conditions of the second test; instructing said alternating signal generator means to supply a signal to a circuit incorporated in the IC in accordance with the measuring conditions of the second test; and measuring the signal output from the circuit incorporated in the IC, comparing the measured value with the predetermined value in accordance with the measuring conditions of the second test, and judging the quality of the IC.
Claim 25
Dependent Claim
24 words
An apparatus for testing an integrated circuit according to claim 18, wherein a frequency characteristic of the IC is measured in said first test.
Claim 26
Dependent Claim
24 words
An apparatus for testing an integrated circuit according to claim 18, wherein an input/output characteristic, of the IC is measured in said first test.
Claim 27
Dependent Claim
25 words
An apparatus for testing an integrated circuit according to claim 18, wherein a relative harmonic content of the IC is measured in said first test.
Claim 28
Dependent Claim
24 words
An apparatus for testing an integrated circuit according to claim 18, wherein a phase characteristic of the IC is measured in said first test.
Claim 29
Dependent Claim
24 words
An apparatus for testing an integrated circuit according to claim 22, wherein a frequency characteristic of the IC is measured in said second test.
Claim 30
Dependent Claim
24 words
An apparatus for testing an integrated circuit according to claim 22, wherein an input/output characteristic of the IC is measured in said second test.
Claim 31
Dependent Claim
25 words
An apparatus for testing an integrated circuit according to claim 22, wherein a relative harmonic content of the IC is measured in said second test.
Claim 32
Dependent Claim
24 words
An apparatus for testing an integrated circuit according to claim 22, wherein a phase characteristic of the IC is measured in said first test.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-04-21 | 1995-10-21 | 1996-04-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-04-21 | 1999-10-21 | 2000-04-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-04-21 | 2003-10-21 | 2004-04-21 | $7700.00 | Window Closed / Lapsed |