US5106780A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device and method of manufacturing the same
Assignee: Toshiba Corp
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Filing: 1991-01-30
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Granted: 1992-04-21
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Expires: 2011-01-30
Abstract
Abstract The present invention provides a semiconductor device, comprising a substrate, a first insulation layer formed on the substrate, a first wiring layer formed on the first insulation layer, a second insulation layer formed on the first wiring layer and having a contact hole, and a third insulation layer formed on the second insulation layer, said third insulation layer being in contact with the first wiring layer via the contact hole.
Inventors
- 👤 Takayoshi Higuchi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 11:27
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/069
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
123 words
A method of manufacturing a semiconductor device, comprising: a first step of forming a first insulation layer on a substrate; a second step of forming a first wiring layer on the first insulation layer; a third step of forming a second insulation layer on the first wiring layer; a fourth step of forming a contact hole in the second insulation layer and a groove in the first insulation layer extending from said contact hole to the substrate; a fifth step of forming a third insulation layer on the entire surface of the substrate with a portion thereof filling the groove; and a sixth step of selectively etching the third insulation layer to leave the portion of the third insulation layer in the groove.
Claim 2
Independent Claim
123 words
A method of manufacturing a semiconductor device, comprising: a first step of forming a first insulation layer on a substrate; a second step of forming a first wiring layer on the first insulation layer; a third step of forming a second insulation layer on the first wiring layer; a fourth step of forming a contact hole in the second insulation layer and a groove in the first insulation layer extending from said contact hole to the substrate; a fifth step of forming a third insulation layer on the entire surface of the substrate with a portion thereof filling the groove; and a sixth step of selectively etching the third insulation layer to leave the portion of the third insulation layer in the groove.
Claim 3
Dependent Claim
26 words
The method of manufacturing a semiconductor device according to claim 1, further comprising a seventh step of forming a second wiring layer filling the contact hole.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-04-21 | 1995-10-21 | 1996-04-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-04-21 | 1999-10-21 | 2000-04-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-04-21 | 2003-10-21 | 2004-04-21 | $7700.00 | Window Closed / Lapsed |