US5105140A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Peristaltic pump motor drive
Assignee: Baxter International Inc
•
Filing: 1990-01-11
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Granted: 1992-04-14
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Expires: 2010-01-11
Abstract
Abstract The present invention provides a drive signal for a peristaltic pump motor. A first circuit is provided which generates a first series of pulses at a given frequency. A second circuit is provided which generates a second series of pulses having a frequency higher than the frequency of the first series of pulses. A third circuit is provided which generates a third series of pulses having a frequency between the frequency of the first and second series of pulses. Finally, a circuit is provided which combines the three series of pulses into a drive signal. The drive signal length is determined by the frequency of the first series of pulses. The drive signal further is divided into two sections, an initial pulse stage determined by the frequency of the third series of pulses, and a modulated pulse stage being a series of pulses determined by the frequency of the second series of pulses.
Inventors
- 👤 Joseph B. Matthews
- 👤 George A. Bowman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 06:19
CPC Classifications
A; A61; A61M; A61M5/00; A61M5/14; A61M5/142; A61M5/14212; A61M5/14228; H; H02; H02P; H02P8/00; H02P8/14; H02P8/16; A61M2205/00; A61M2205/82; A61M2205/8206; A61M2205/8212
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
204 words
A device for modulating a drive signal to drive a motor, comprising: a first circuit means for generating a first series of pulses at a given frequency; a second circuit means for generating a second series of pulses, the second series of pulses having a frequency higher than the frequency of the first series of pulses; a third circuit means for generating a third series of pulses, the third circuit means including a divider means in communication with a counter means, the divider means having as an input the first series of pulses, the third series of pulses having a frequency between the frequency of the first series of pulses and the second series of pulses; and means of combining the first, second and third series of pulses to provide the drive signal, the length of the drive signal being determined by the frequency of the first series of pulses, the drive signal further including an initial pulse stage, the length of the initial pulse stage being determined by the frequency of the third series of pulses, the remainder of the length of the drive signal being a series of pulses of the same frequency as the frequency of the second series of pulses.
Claim 2
Independent Claim
204 words
A device for modulating a drive signal to drive a motor, comprising: a first circuit means for generating a first series of pulses at a given frequency; a second circuit means for generating a second series of pulses, the second series of pulses having a frequency higher than the frequency of the first series of pulses; a third circuit means for generating a third series of pulses, the third circuit means including a divider means in communication with a counter means, the divider means having as an input the first series of pulses, the third series of pulses having a frequency between the frequency of the first series of pulses and the second series of pulses; and means of combining the first, second and third series of pulses to provide the drive signal, the length of the drive signal being determined by the frequency of the first series of pulses, the drive signal further including an initial pulse stage, the length of the initial pulse stage being determined by the frequency of the third series of pulses, the remainder of the length of the drive signal being a series of pulses of the same frequency as the frequency of the second series of pulses.
Claim 3
Dependent Claim
16 words
The device of claim 1 wherein the first series of pulses is a step clock signal.
Claim 4
Dependent Claim
38 words
The device of claim 1 wherein the first circuit means for generating a step clock signal includes a divider means the input of which is an external clock signal, the output of which is the step clock signal.
Claim 5
Dependent Claim
20 words
The device of claim 1 wherein the second circuit means for generating a second series of pulses includes a counter.
Claim 6
Dependent Claim
21 words
The device of claim 1 further including means for synchronizing the first series of pulses and the second series of pulses.
Claim 7
Dependent Claim
17 words
The device of claim 1 further including means for monitoring the power consumption of the driving motor.
Claim 8
Dependent Claim
20 words
The device of claim 1 wherein the second circuit means for generating a second series of pulses includes a counter.
Claim 9
Independent Claim
202 words
A device for modulating a drive signal to drive a motor, comprising: a first circuit means for generating a first series of pulses at a given frequency; a second circuit means for generating a second series of pulses, the second series of pulses having a frequency higher than the frequency of the first series of pulses; a third circuit means for generating a third series of pulses, having a frequency between the frequency of the first series of pulses and the second series of pulses; means for synchronizing the first series of pulses and the second series of pulses, the synchronizing means including a divider having as an input the first series of pulses; and means for combining the first, second and third series of pulses to provide the drive signal, the length of the drive signal being determined by the frequency of the first series of pulses, the drive signal further including an initial pulse stage, the length of the initial pulse stage being determined by the frequency of the third series of pulses, the remainder of the length of the drive signal being a series of pulses of the same frequency as the frequency of the second series of pulses.
Claim 10
Independent Claim
202 words
A device for modulating a drive signal to drive a motor, comprising: a first circuit means for generating a first series of pulses at a given frequency; a second circuit means for generating a second series of pulses, the second series of pulses having a frequency higher than the frequency of the first series of pulses; a third circuit means for generating a third series of pulses, having a frequency between the frequency of the first series of pulses and the second series of pulses; means for synchronizing the first series of pulses and the second series of pulses, the synchronizing means including a divider having as an input the first series of pulses; and means for combining the first, second and third series of pulses to provide the drive signal, the length of the drive signal being determined by the frequency of the first series of pulses, the drive signal further including an initial pulse stage, the length of the initial pulse stage being determined by the frequency of the third series of pulses, the remainder of the length of the drive signal being a series of pulses of the same frequency as the frequency of the second series of pulses.
Claim 11
Dependent Claim
39 words
The device of claim 8 wherein the third circuit means for generating a third series of pulses includes a divider means in communication with a counter means, the divider means having as an input the first series of pulses.
Claim 12
Dependent Claim
16 words
The device of claim 8 wherein the first series of pulses is a step clock signal.
Claim 13
Dependent Claim
38 words
The device of claim 8 wherein the first circuit means for generating a step clock signal includes a divider means the input of which is an external clock signal, the output of which is the step clock signal.
Claim 14
Dependent Claim
20 words
The device of claim 8 wherein the second circuit means for generating a second series of pulses includes a counter.
Claim 15
Dependent Claim
17 words
The device of claim 8 further including means for monitoring the power consumption of the driving motor.
Claim 16
Dependent Claim
87 words
The device of claim 13 wherein the means for monitoring the power consumption of the driving motor includes: transistor means connected between the combining means and the motor; resistive means connected between the transistor means and ground; amplifying means having an input connected to the junction of the transistor means and the resistive means and an output connected to a microprocessor, the amplifying means amplifies the voltage across the resistive mans, the microprocessor adjusts the drive signal as a function of the voltage across the resistive means.
Claim 17
Independent Claim
261 words
A device for modulating a drive signal to drive a motor, comprising: a first circuit means for generating a first series of pulses at a given frequency; a second circuit means for generating a second series of pulses, the second series of pulses having a frequency higher than the frequency of the first series of pulses; a third circuit means for generating a third series of pulses, the third series of pulses having a frequency between the frequency of the first series of pulses and the second series of pulses; means for combining the first, second and third series of pulses to provide the drive signal, the length of the drive signal being determined by the frequency of the first series of pulses, the drive signal further including an initial pulse stage, the length of the initial pulse stage being determined by the frequency of the third series of pulses, the remainder of the length of the drive signal being a series of pulses of the same frequency as the frequency of the second series of pulses; and means for monitoring the power consumption of the motor, the monitoring means including transistor means connected between the combining means and the motor, resistive means connected between the transistor means and ground, and amplifying means having an input connected to the junction of the transistor means and the resistive means and an output connected to an microprocessor, the amplifying means amplifies the voltage across the resistive means, the microprocessor adjusts the drive signal as a function of the voltage across the resistive means.
Claim 18
Independent Claim
261 words
A device for modulating a drive signal to drive a motor, comprising: a first circuit means for generating a first series of pulses at a given frequency; a second circuit means for generating a second series of pulses, the second series of pulses having a frequency higher than the frequency of the first series of pulses; a third circuit means for generating a third series of pulses, the third series of pulses having a frequency between the frequency of the first series of pulses and the second series of pulses; means for combining the first, second and third series of pulses to provide the drive signal, the length of the drive signal being determined by the frequency of the first series of pulses, the drive signal further including an initial pulse stage, the length of the initial pulse stage being determined by the frequency of the third series of pulses, the remainder of the length of the drive signal being a series of pulses of the same frequency as the frequency of the second series of pulses; and means for monitoring the power consumption of the motor, the monitoring means including transistor means connected between the combining means and the motor, resistive means connected between the transistor means and ground, and amplifying means having an input connected to the junction of the transistor means and the resistive means and an output connected to an microprocessor, the amplifying means amplifies the voltage across the resistive means, the microprocessor adjusts the drive signal as a function of the voltage across the resistive means.
Claim 19
Dependent Claim
16 words
The device of claim 15 wherein the first series of pulses is a step clock signal.
Claim 20
Dependent Claim
38 words
The device of claim 15 wherein the first circuit means for generating a step clock signal includes a divider means the input of which is an external clock signal, the output of which is the step clock signal.
Claim 21
Dependent Claim
39 words
The device of claim 15 wherein the third circuit means for generating a third series of pulses includes a divider means in communication with a counter means, the divider means having as an input the first series of pulses.
Claim 22
Dependent Claim
21 words
The device of claim 15 further including means for synchronizing the first series of pulses and the second series of pulses.
Claim 23
Dependent Claim
21 words
The device of claim 19 wherein the synchronizing means includes a divider having as an input the first series of pulses.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-04-14 | 1995-10-14 | 1996-04-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-04-14 | 1999-10-14 | 2000-04-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-04-14 | 2003-10-14 | 2004-04-14 | $7700.00 | Window Closed / Lapsed |