US5103157A
Expired / Lapsed
US
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Common emitter amplifiers operating from a multiplicity of power supplies
Assignee: National Semiconductor Corp
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Filing: 1990-07-10
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Granted: 1992-04-07
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Expires: 2010-07-10
Abstract
Abstract A technique for operating a common emitter circuit from a plurality of supply voltages. In one embodiment, a current mirror includes a plurality of diode-connected transistors each connected between a source of current and associated supply voltages. Corresponding current mirrors are each connected between an output terminal associated supply voltage leads, thereby providing an output current mirrored from the soure of current, regardless of which of the supply voltages are activated, and regardless of their particular levels. In another embodiment, a regulator includes an output transistor having a plurality of current handling terminals, each connected to an associated supply voltage, and a second current handling terminal coupled to an output terminal. Feedback is provided between the output and the control terminal of the output transistors, insuring a regulated output regardless of which of the supply voltages are active at any given time, and without regard to the specific levels of the plurality of supply voltages. The feedback is provided by a differential input amplifier, or the like, and can derive its supply voltage from a plurality of supply leads utilizing a diode OR connection in order to insure that suitable feedback supply is provided regardless of the levels of the various supply voltages. In another embodiemnt, an operational amplifier circuit includes pull up and pull down output transistors, having their collectors connected to the output terminal, and one of a plurality of emitters connected to one of a plurality of positive supply voltages and negative supply voltages, respectively.
Inventors
- 👤 Michael E. Wright
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 03:51
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; H; H03; H03F; H03F3/00; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/265; H03F3/30; H03F3/3066; H03F3/34; H03F3/343
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
139 words
A current mirror comprising: a first supply voltage lead for receiving a first supply voltage; a second supply voltage lead for receiving a second supply voltage capable of having a voltage different than said first supply voltage; a current source; an output lead; a first transistor connected as a load device between said first supply voltage lead and said current a second transistor connected as a load device between said second supply voltage lead and said current source; a first mirror transistor coupled between said first supply voltage lead and said output lead in order to mirror to said output lead the current flowing through said first transistor; and a second mirror transistor coupled between said second supply voltage lead and said output lead in order to mirror to said output lead the current flowing through said second transistor.
Claim 2
Dependent Claim
139 words
A current mirror comprising: a first supply voltage lead for receiving a first supply voltage; a second supply voltage lead for receiving a second supply voltage capable of having a voltage different than said first supply voltage; a current source; an output lead; a first transistor connected as a load device between said first supply voltage lead and said current a second transistor connected as a load device between said second supply voltage lead and said current source; a first mirror transistor coupled between said first supply voltage lead and said output lead in order to mirror to said output lead the current flowing through said first transistor; and a second mirror transistor coupled between said second supply voltage lead and said output lead in order to mirror to said output lead the current flowing through said second transistor.
Claim 3
Dependent Claim
90 words
A current mirror comprising: a plurality of supply voltage leads, each for receiving an associated one of a plurality of supply voltages; a current source; an output lead; a plurality of transistors, each connected as a load device between an associated one of said supply voltage leads and said current source; and a plurality of mirror transistors, each coupled between an associated one of said supply voltage leads and said output lead in order to mirror to said output lead the current flowing through a corresponding one of said transistors.
Claim 4
Dependent Claim
90 words
A current mirror comprising: a plurality of supply voltage leads, each for receiving an associated one of a plurality of supply voltages; a current source; an output lead; a plurality of transistors, each connected as a load device between an associated one of said supply voltage leads and said current source; and a plurality of mirror transistors, each coupled between an associated one of said supply voltage leads and said output lead in order to mirror to said output lead the current flowing through a corresponding one of said transistors.
Claim 5
Dependent Claim
125 words
A regulator circuit comprising: a plurality of supply voltage leads, each for receiving an associated one of a plurality of supply voltages; an output terminal for providing a regulated output; output means coupled between said plurality of supply voltage leads and said output terminal; sense means coupled to said output terminal; and control means coupled to said sense means for providing a control signal to said output means in order to provide a regulated output on said output terminal, wherein said output means comprises a transistor circuit comprises: a plurality of first current handling terminals, each coupled to an associated one of said supply voltage leads; a second current handling terminal coupled to said output terminal; and a control terminal for receiving said control signal.
Claim 6
Dependent Claim
125 words
A regulator circuit comprising: a plurality of supply voltage leads, each for receiving an associated one of a plurality of supply voltages; an output terminal for providing a regulated output; output means coupled between said plurality of supply voltage leads and said output terminal; sense means coupled to said output terminal; and control means coupled to said sense means for providing a control signal to said output means in order to provide a regulated output on said output terminal, wherein said output means comprises a transistor circuit comprises: a plurality of first current handling terminals, each coupled to an associated one of said supply voltage leads; a second current handling terminal coupled to said output terminal; and a control terminal for receiving said control signal.
Claim 7
Dependent Claim
150 words
A regulator circuit comprising: a plurality of supply votlage leads, each for receiving an associated one of a plurality of supply voltages; an output terminal for providing a regulated output; output means coupled between said plurality of supply voltage leads and said output terminal; sense means coupled to said output terminal; and control means coupled to said sense means for providing a control signal to said output means in order to provide a regulated output on said output terminal, wherein said control means comprises: a differential input amplifier having a first input lead for receiving a reference signal setting the desired output level, a second input lead coupled to said sense means, an output lead for providing said control signal, and a power supply lead; and a plurality of diodes, each coupled between an associated one of said supply voltage leads and said power supply lead of said differential amplifier.
Claim 8
Dependent Claim
150 words
A regulator circuit comprising: a plurality of supply votlage leads, each for receiving an associated one of a plurality of supply voltages; an output terminal for providing a regulated output; output means coupled between said plurality of supply voltage leads and said output terminal; sense means coupled to said output terminal; and control means coupled to said sense means for providing a control signal to said output means in order to provide a regulated output on said output terminal, wherein said control means comprises: a differential input amplifier having a first input lead for receiving a reference signal setting the desired output level, a second input lead coupled to said sense means, an output lead for providing said control signal, and a power supply lead; and a plurality of diodes, each coupled between an associated one of said supply voltage leads and said power supply lead of said differential amplifier.
Claim 9
Dependent Claim
81 words
An operational amplifier circuit comprising: a plurality of first supply voltage leads, each for receiving an associated one of a plurality of first supply voltages; a plurality of second supply voltage leads, each for receiving an associated one of a plurlaity of second supply voltages; an output terminal; first output means coupled between said plurality of first supply voltage leads and said output terminal; and second output means coupled between said plurality of second supply voltage leads and said output terminal.
Claim 10
Dependent Claim
81 words
An operational amplifier circuit comprising: a plurality of first supply voltage leads, each for receiving an associated one of a plurality of first supply voltages; a plurality of second supply voltage leads, each for receiving an associated one of a plurlaity of second supply voltages; an output terminal; first output means coupled between said plurality of first supply voltage leads and said output terminal; and second output means coupled between said plurality of second supply voltage leads and said output terminal.
Claim 11
Dependent Claim
108 words
An operational amplifier circuit as in claim 1, wherein: said first output means comprises a transistor circuit comprising: a plurality of first current handling terminals, each coupled to an associated one of said first supply voltage leads, a second current handling terminal coupled to said output terminal; and a control terminal for receiving at least one control signal; and said second output means comprises a transistor circuit comprising: a plurality of first current handling terminals, each coupled to an associated one of said second supply voltage leads; a second current handling terminal coupled to said output terminal; and a control terminal for receiving at least one control signal.
Claim 12
Dependent Claim
124 words
An operational amplifier circuit as in claim 6 which further includes control means which comprises: a differential input amplifier having a first input lead for receiving a reference signal defining the desired output level, a second input lead coupled to means for sensing the output level, an output lead for providing at least one of said control signals, a first power supply lead, and a second power supply lead; a first plurality of diodes, each coupled between an associated one of said first supply voltage leads and said first power supply lead of said differential amplifier; and a second plurality of diodes, each coupled betwen an associated one of said second supply voltage leads and said second power supply lead of said differential amplifier.
Claim 13
Dependent Claim
89 words
A power supply circuit comprising: a plurality of supply voltage leads for receiving a plurality of supply voltages; an output lead; and a plurality of pass transistors, each having a first current carrying lead coupled to an associated one of said plurality of supply voltage leads, a second current handling lead coupled to said output lead, and a control lead, each of said control leads being connected in common; whereby said output terminal provides a regulated output voltage supplied by at least one of said plurality of supply voltages.
Claim 14
Dependent Claim
89 words
A power supply circuit comprising: a plurality of supply voltage leads for receiving a plurality of supply voltages; an output lead; and a plurality of pass transistors, each having a first current carrying lead coupled to an associated one of said plurality of supply voltage leads, a second current handling lead coupled to said output lead, and a control lead, each of said control leads being connected in common; whereby said output terminal provides a regulated output voltage supplied by at least one of said plurality of supply voltages.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-04-07 | 1995-10-07 | 1996-04-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-04-07 | 1999-10-07 | 2000-04-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-04-07 | 2003-10-07 | 2004-04-07 | $7700.00 | Window Closed / Lapsed |