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US5100813A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of manufacturing bipolar transistor

Assignee: Toshiba Corp
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Filing: 1990-01-19
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Granted: 1992-03-31
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Expires: 2010-01-19
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Abstract

Abstract A method of manufacturing a bipolar transistor. A first mask material film pattern is formed on an internal base region prospective portion on a collector region of a first conductive type, and then a first conductive film is deposited. A recess around the projection of the mask film pattern are transferred on the surface of the first conductive film. After a second mask material film pattern is buried in the recess, the first conductive film is selectively etched using the second mask material pattern as a mask, thereby exposing the first mask material film pattern. The first conductive film is continuously, selectively etched by anisotropic etching using the exposed first mask material film pattern and the second mask material film pattern as etching masks to form a first opening between the two mask material film patterns. An impurity of a second conductivity type is doped in the wafer through the first opening to form an external base region of the second conductivity type. The first opening is buried with a second conductive film bfore or after formation of the external base region. The first mask material film pattern is removed to form a second opening. After a thermal oxide film is formed on the surface of the second conductive film, an impurity of the second conductivity type is doped in the wafer through the second opening, thereby forming the internal base region. An impurity of the first conductivity type is doped in the wafer through the second opening to form an emitter region.

Inventors

  • 👤 Hiroyuki Nihira
  • 👤 Nobuyuki Itoh

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 09:05
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10P; H10P76/00; H10P76/40; Y; Y10; Y10S; Y10S148/00; Y10S148/124

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 413 words
A method of manufacturing a bipolar transistor, comprising the steps of: a) forming an anti-oxidation film on a semiconductor wafer having a collector region of a first conductivity type, and stacking an insulating film for step forming on said anti-oxidation film; b) patterning stacked films consisting of said anti-oxidation film and said insulating film for step forming to form a stacked film pattern covering an internal base region prospective portion; c) depositing a first mask material film on the entire surface; d) depositing a conductive material on the surface to cover said first mask material film, thereby forming a first conductive film used as a part of a base electrode; e) burying a second mask material film pattern in a recess on the surface of said first conductive film; f) selectively etching said first conductive film using said second mask material film pattern as an etching mask t expose said first mask material film on said stacked film pattern; g) completely, selectively etching said first conductive film by anistropic etching using said exposed first mask material film and said second mask material film patterns as etching masks, and exposing the surface of said collector region, thereby forming a first opening for forming an external base region between said two mask material film patterns; h) removing said second mask material film pattern; i) burying a second conductive film doped with an impurity of the first conductivity type serving as a base electrode in said first opening; j) removing first mask material film left on the side wall of said stacked film pattern and said insulating film for step forming which constitutes said stacked film pattern thereby forming a second opening for forming an internal base region; k) performing thermal oxidation using said anti-oxidation film left in step j) to form a thermal oxide film on a surface of said second conductive film, and diffusing the impurity contained in said second conductive film into said collector region, thereby forming said external base region of a second conductivity type; l) doping an impurity of the second conductivity type into said wafer through said second opening, thereby forming an emitter region of the second conductivity type; m) exposing the wafer surface through said second opening, and depositing a third conductive film serving as a part of an emitter electrode; and n) diffusing an impurity of the first conductivity type from said third conductive film in said wafer to form an emitter region of the first conductivity type.
Claim 2
Independent Claim 413 words
A method of manufacturing a bipolar transistor, comprising the steps of: a) forming an anti-oxidation film on a semiconductor wafer having a collector region of a first conductivity type, and stacking an insulating film for step forming on said anti-oxidation film; b) patterning stacked films consisting of said anti-oxidation film and said insulating film for step forming to form a stacked film pattern covering an internal base region prospective portion; c) depositing a first mask material film on the entire surface; d) depositing a conductive material on the surface to cover said first mask material film, thereby forming a first conductive film used as a part of a base electrode; e) burying a second mask material film pattern in a recess on the surface of said first conductive film; f) selectively etching said first conductive film using said second mask material film pattern as an etching mask t expose said first mask material film on said stacked film pattern; g) completely, selectively etching said first conductive film by anistropic etching using said exposed first mask material film and said second mask material film patterns as etching masks, and exposing the surface of said collector region, thereby forming a first opening for forming an external base region between said two mask material film patterns; h) removing said second mask material film pattern; i) burying a second conductive film doped with an impurity of the first conductivity type serving as a base electrode in said first opening; j) removing first mask material film left on the side wall of said stacked film pattern and said insulating film for step forming which constitutes said stacked film pattern thereby forming a second opening for forming an internal base region; k) performing thermal oxidation using said anti-oxidation film left in step j) to form a thermal oxide film on a surface of said second conductive film, and diffusing the impurity contained in said second conductive film into said collector region, thereby forming said external base region of a second conductivity type; l) doping an impurity of the second conductivity type into said wafer through said second opening, thereby forming an emitter region of the second conductivity type; m) exposing the wafer surface through said second opening, and depositing a third conductive film serving as a part of an emitter electrode; and n) diffusing an impurity of the first conductivity type from said third conductive film in said wafer to form an emitter region of the first conductivity type.
Claim 3
Dependent Claim 21 words
A method according to claim 1, wherein each of said first to third conductive films comprises of a polycrystalline silicon film.
Claim 4
Dependent Claim 16 words
A method according to claim 1, wherein said anti-oxidation film comprises of a silicon nitride film.
Claim 5
Dependent Claim 22 words
A method according to claim 1, wherein a buffer oxide film is interposed between said silicon nitride film and said semiconductor wafer.
Claim 6
Dependent Claim 23 words
A method according to claim 1, wherein said internal base region is formed by ion implantation before said third conductive film is formed.
Claim 7
Independent Claim 414 words
A method of manufacturing a bipolar transistor, comprising the steps of: a) forming an anti-oxidation film on a semiconductor wafer having a collector region of a first conductivity type, and stacking an insulating film for step forming on said anti-oxidation film; b) patterning stacked films consisting of said anti-oxidation film and said insulating film for step forming to form a stacked film pattern covering an internal base region prospective portion; c) depositing a first mask material film on the entire surface; d) depositing a conductive material on the surface to cover said first mask material film, thereby forming a first conductive film used as a part of a base electrode; e) burying a second mask material film pattern in a recess on the surface of said first conductive film; f) selectively etching said first conductive film using said second mask material film pattern as an etching mask t expose said first mask material film on said stacked film pattern; g) completely, selectively etching said first conductive film by anistropic etching using said exposed first mask material film and said second mask material film patterns as etching masks, and exposing the surface of said collector region, thereby forming a first opening for forming an external base region between said two mask material film patterns; h) removing said second mask material film pattern; i) burying a second conductive film doped with an impurity of the first conductivity type serving as a base electrode in said first opening; j) removing said insulating film for step forming which constitutes said stacked film pattern thereby forming a second opening for forming an internal base region, said first mask material film being remained on the side wall of said stacked film pattern; k) performing thermal oxidation using said anti-oxidation film left in step j) to form a thermal oxide film on a surface of said second conductive film, and diffusing the impurity contained in said second conductive film into said collector region, thereby forming said external base region of a second conductivity type; l) doping an impurity of the second conductivity type into said wafer through said second opening, thereby forming an emitter region of the second conductivity type; m) exposing the wafer surface through said second opening, and depositing a third conductive film serving as a part of an emitter electrode; and n) diffusing an impurity of the first conductivity type from said third conductive film in said wafer to form an emitter region of the first conductivity type.
Claim 8
Independent Claim 414 words
A method of manufacturing a bipolar transistor, comprising the steps of: a) forming an anti-oxidation film on a semiconductor wafer having a collector region of a first conductivity type, and stacking an insulating film for step forming on said anti-oxidation film; b) patterning stacked films consisting of said anti-oxidation film and said insulating film for step forming to form a stacked film pattern covering an internal base region prospective portion; c) depositing a first mask material film on the entire surface; d) depositing a conductive material on the surface to cover said first mask material film, thereby forming a first conductive film used as a part of a base electrode; e) burying a second mask material film pattern in a recess on the surface of said first conductive film; f) selectively etching said first conductive film using said second mask material film pattern as an etching mask t expose said first mask material film on said stacked film pattern; g) completely, selectively etching said first conductive film by anistropic etching using said exposed first mask material film and said second mask material film patterns as etching masks, and exposing the surface of said collector region, thereby forming a first opening for forming an external base region between said two mask material film patterns; h) removing said second mask material film pattern; i) burying a second conductive film doped with an impurity of the first conductivity type serving as a base electrode in said first opening; j) removing said insulating film for step forming which constitutes said stacked film pattern thereby forming a second opening for forming an internal base region, said first mask material film being remained on the side wall of said stacked film pattern; k) performing thermal oxidation using said anti-oxidation film left in step j) to form a thermal oxide film on a surface of said second conductive film, and diffusing the impurity contained in said second conductive film into said collector region, thereby forming said external base region of a second conductivity type; l) doping an impurity of the second conductivity type into said wafer through said second opening, thereby forming an emitter region of the second conductivity type; m) exposing the wafer surface through said second opening, and depositing a third conductive film serving as a part of an emitter electrode; and n) diffusing an impurity of the first conductivity type from said third conductive film in said wafer to form an emitter region of the first conductivity type.
Claim 9
Dependent Claim 21 words
A method according to claim 6, wherein each of said first to third conductive films comprises of a polycrystalline silicon film.
Claim 10
Dependent Claim 16 words
A method according to claim 6, wherein said anti-oxidation film comprises of a silicon nitride film.
Claim 11
Dependent Claim 22 words
A method according to claim 6, wherein a buffer oxide film is interposed between said silicon nitride film and said semiconductor wafer.
Claim 12
Dependent Claim 23 words
A method according to claim 6, wherein said internal base region is formed by ion implantation before said third conductive film is formed.

References Cited (Backward Citations)

JPS587862A Cited
US4780427A Cited
US4693782A Cited
US4908324A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-03-31 1995-09-30 1996-03-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-03-31 1999-09-30 2000-03-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-03-31 2003-09-30 2004-03-31 $7700.00 Window Closed / Lapsed

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