US5097593A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of forming a hybrid printed circuit board
Assignee: International Business Machines Corp
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Filing: 1990-05-18
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Granted: 1992-03-24
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Expires: 2010-05-18
Abstract
Abstract An improved circuit board structure and method of forming the same are provided. The circuit board includes an insulating core and has plated through holes connecting the circuitry on both sides and intermediate layers of the core. A permanent dielectric material is applied on at least one surface of the board covering the circuitry and plated through holes. Vias are formed through the dielectric material and signal lines are formed on the top of the dielectric material connected to the circuitry onto the board through the vias. Additional layers of dielectric material with additional wiring and vias can also be formed for multi-level wiring.
Inventors
- 👤 Alan L. Jones
- 👤 Keith A. Snyder
- 👤 Paul E. Winkler
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 00:00
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/02; H05K1/11; H05K1/115; H05K3/00; H05K3/46; H05K3/4602; H05K1/0286; H05K1/0287; H05K1/0289; H05K2201/00; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/09509; H05K2201/09536; H05K2201/09563; H05K2201/09627; H05K2203/00; H05K2203/06; H05K2203/068; H05K2203/10; H05K2203/107; H05K2203/13; H05K2203/1377; H05K2203/1394; H05K2203/15; H05K2203/1581; H05K3/0011; H05K3/0017; H05K3/0023; H05K3/0026; H05K3/0032; H05K3/0035; H05K3/10; H05K3/108; H05K3/38; H05K3/388; H05K3/40; H05K3/42; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49155; Y10T29/49165
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
125 words
A method of forming an improved printed circuit board which board has an insulating core and plated through holes, and which board further includes electrical circuitry on at least one side thereof which circuitry includes lands connected to said plated through holes, said method comprising the steps of; providing a permanent dielectric material on at least one surface of said board covering the circuitry and the plated through holes, forming vias through said permanent dielectric material to communicate with circuitry connected to said plated through holes; forming electrical circuit lines on said permanent dielectric material at least a portion of which circuit lines overlies said plated through holes and is insulated therefrom, and connecting said circuitry to said wiring on said board through said vias.
Claim 2
Independent Claim
125 words
A method of forming an improved printed circuit board which board has an insulating core and plated through holes, and which board further includes electrical circuitry on at least one side thereof which circuitry includes lands connected to said plated through holes, said method comprising the steps of; providing a permanent dielectric material on at least one surface of said board covering the circuitry and the plated through holes, forming vias through said permanent dielectric material to communicate with circuitry connected to said plated through holes; forming electrical circuit lines on said permanent dielectric material at least a portion of which circuit lines overlies said plated through holes and is insulated therefrom, and connecting said circuitry to said wiring on said board through said vias.
Claim 3
Dependent Claim
24 words
The invention as defined in claim 1 wherein said dielectric material is a photo resist material and said vias are formed by photo lithography.
Claim 4
Dependent Claim
80 words
The invention defined in claim 1 further characterized by providing a second layer of permanent dielectric material overlying the circuit lines and the top surface of said first dielectric material, forming circuit lines on said second layer of dielectric material, and connecting at least a portion of said second circuit lines on said second layer of dielectric material to the first circuit lines on the first layer of dielectric material through vias formed in said second layer of dielectric material.
Claim 5
Dependent Claim
39 words
The invention as defined in claim 3 wherein the first circuit lines and the second circuit lines. each includes a series of parallel signal lines and wherein the second circuit lines are generally orthogonal to said first circuit lines,
Claim 6
Dependent Claim
30 words
The invention as defined in claim 1 wherein said dielectric material is polytetrafluoroethylene and the vias therein are formed by removing by mechanical or laser means portions of dielectric material.
Claim 7
Dependent Claim
21 words
The invention are defined in claim 2 wherein said photoresist material is an epoxy resin having a photo initiator contained therein.
Claim 8
Dependent Claim
27 words
The invention as defined in claim 6 wherein said resin includes a multi-function epoxy resin component, a cycloaliphatic epoxy resin component, and a trifunctional epoxy resin component.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-03-24 | 1995-09-23 | 1996-03-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-03-24 | 1999-09-23 | 2000-03-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-03-24 | 2003-09-23 | 2004-03-24 | $7700.00 | Window Closed / Lapsed |