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Process and apparatus for treatment of an analog electric signal for obtaining a parametrable binary signal representative of its significant component

Assignee: ACEMIS FRANCE Ste
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Filing: 1989-08-03
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Granted: 1992-03-17
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Expires: 2009-08-03
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Abstract

Abstract A process and an apparatus for treatment of an analog electric signal, in particular the image signal of bar codes, for obtaining a parametrable binary signal, the process comprising storing certain non-linear filtering parameters (MP) and, after having converted the analog signal into a digital signal (CAN), detecting sequentially the successive extremums of said digital signal (PIC) by an iterative treatment while considering said parameters, and then carrying out in each sequence a sigmentation treatment (BIN) by the detection of each extremum, for extracting and storing (RAM) the length of the representative segments of the succession of extremums.

Inventors

  • 👤 Gilbert Delpech
  • 👤 Benoit Moulas

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 04:28
CPC Classifications
G; G06; G06K; G06K7/00; G06K7/10; G06K7/10544; G06K7/10821; G06K7/10851

Claims Analysis

Total Claims: 31
Claim 1
Independent Claim 596 words
A process for the treatment of an analog electric signal including a significant component comprising extremums separated by rising and falling transitions, and a parasitic component comprising a parasitic modulation of the significant component and residual noise, said process permitting the obtention of a parametrable binary signal representative of the significant component of the analog signal and uninfluenced by the parasitic component and comprising: (t 0 ) in a preliminary step, storing the chosen values for the following parameters: the minimum distance (dmin) between two successive extremums, the threshold (a) of the level of residual noise, (t 1 ) converting said analog signal to a digital signal on an assembly of values adapted to differentiate the extremums of the analog signal, and carrying out said conversion with a sampling frequency sufficient to sample the transitions of said signal, for obtaining a series of numeric samples representative of the extremums and of the transitions of the analog signal, (t 2 ) sequentially detecting the successive extremums of the numeric signal, while carrying out an iterative treatment having as the current sequence (n) the following sequence: storing the extremum (E n-1 ) detected in the preceding sequence (n-1), storing at each step (p) of the sequence a current numeric sample (y p ) corresponding to said step and a previous sample (y p-1 ) of the next preceding step, calculating the absolute value of the difference Y p-1 -E n-1 , comparing said absolute value to said noise threshold (a) and generating a first binary comparison signal (sd 5 ), counting down the number of steps since the beginning of the sequence for calculating the distance (d) separating said first sample (Y p-1 ) and the preceding extremum (E n-1 ), comparing said distance (d) to said minimum distance (dmin), and generating a second binary comparison signal (sd 6 ), storing the sign of the difference between said current numeric sample and said previous numeric sample (y p -y p-1 ), comparing said sign with the corresponding difference sign (Y p-1 -Y p-2 ) stored in the next preceding step and generating a binary sign comparison signal (picd), and validating the previous sample (Y p-1 ) as a new extremum (E n ) and storing said new extremum when the comparison signals are representative of the following validation conditions: and the sign comparison signal (picd) is representative of a sign inversion, |y.sub.p-1 -E.sub.n-1 |>a d>dmin (t 3 ) carrying out at each sequence (n) a segmenting treatment beginning with the detection of each extremum (E n ), by the following operations: storing the samples (Y 1 . . . Y p ) which are between the detected extremums (E n ) and the preceding extremum (E n-1 ), operating on said detected and preceding extremums (E n-1 , E n ) a summing function for generating a threshold signal (S), search for the average sample having a value closest to this threshold and calculating and storing the distances (l n ) and (l' n ) of this sample with respect to the current and preceding extremums (E n-1 ) and (E n ), and calculating the sum of the distances (l' n-1 +l n ) between the average sample of the current sequence (n) and the average sample of the preceding sequence (n-1), and (t 4 ) storing the sums of the distances ( . . . , l' n-2 +l n-1 , l' n-1 +l n , l' n +l n+1 , . . . ) calculated during the successive sequences, for generating the parametrable binary signal.
Claim 2
Dependent Claim 596 words
A process for the treatment of an analog electric signal including a significant component comprising extremums separated by rising and falling transitions, and a parasitic component comprising a parasitic modulation of the significant component and residual noise, said process permitting the obtention of a parametrable binary signal representative of the significant component of the analog signal and uninfluenced by the parasitic component and comprising: (t 0 ) in a preliminary step, storing the chosen values for the following parameters: the minimum distance (dmin) between two successive extremums, the threshold (a) of the level of residual noise, (t 1 ) converting said analog signal to a digital signal on an assembly of values adapted to differentiate the extremums of the analog signal, and carrying out said conversion with a sampling frequency sufficient to sample the transitions of said signal, for obtaining a series of numeric samples representative of the extremums and of the transitions of the analog signal, (t 2 ) sequentially detecting the successive extremums of the numeric signal, while carrying out an iterative treatment having as the current sequence (n) the following sequence: storing the extremum (E n-1 ) detected in the preceding sequence (n-1), storing at each step (p) of the sequence a current numeric sample (y p ) corresponding to said step and a previous sample (y p-1 ) of the next preceding step, calculating the absolute value of the difference Y p-1 -E n-1 , comparing said absolute value to said noise threshold (a) and generating a first binary comparison signal (sd 5 ), counting down the number of steps since the beginning of the sequence for calculating the distance (d) separating said first sample (Y p-1 ) and the preceding extremum (E n-1 ), comparing said distance (d) to said minimum distance (dmin), and generating a second binary comparison signal (sd 6 ), storing the sign of the difference between said current numeric sample and said previous numeric sample (y p -y p-1 ), comparing said sign with the corresponding difference sign (Y p-1 -Y p-2 ) stored in the next preceding step and generating a binary sign comparison signal (picd), and validating the previous sample (Y p-1 ) as a new extremum (E n ) and storing said new extremum when the comparison signals are representative of the following validation conditions: and the sign comparison signal (picd) is representative of a sign inversion, |y.sub.p-1 -E.sub.n-1 |>a d>dmin (t 3 ) carrying out at each sequence (n) a segmenting treatment beginning with the detection of each extremum (E n ), by the following operations: storing the samples (Y 1 . . . Y p ) which are between the detected extremums (E n ) and the preceding extremum (E n-1 ), operating on said detected and preceding extremums (E n-1 , E n ) a summing function for generating a threshold signal (S), search for the average sample having a value closest to this threshold and calculating and storing the distances (l n ) and (l' n ) of this sample with respect to the current and preceding extremums (E n-1 ) and (E n ), and calculating the sum of the distances (l' n-1 +l n ) between the average sample of the current sequence (n) and the average sample of the preceding sequence (n-1), and (t 4 ) storing the sums of the distances ( . . . , l' n-2 +l n-1 , l' n-1 +l n , l' n +l n+1 , . . . ) calculated during the successive sequences, for generating the parametrable binary signal.
Claim 3
Dependent Claim 286 words
A treatment process as in claim 1, and including initializing the sequential extremum detection (t 2 ) during the initialization sequences by means of references (R 0 , R 1 , . . . R m ), obtained while carrying out an iterative initialization treatment (t i ) having as the current initialization sequence: storing at each current step (p) of said initialization sequence a numeric sample (Y p ) corresponding to said current step and the sample (y p-1 ) of the preceding step, comparing the absolute value Y p-1 -E n-1 to the noise threshold (a) and generating said first binary comparison signal (sd 5 ), said value E n-1 being the last valid extremum or zero at the default of valid extremum, counting down the number of steps since the beginning of the treatment for calculating the distance (d) separating said previous sample (Y p-1 ) from the beginning of treatment of the last reference, comparing said distance (d) to said minimum distance (dmin) and generating a third binary sign comparison signal (sd 6 ), storing the sign of the difference between the current numeric sample and the previous numeric sample (y p -y p-1 ) comparing said newly stored sign with the corresponding difference sign (Y p-1 -Y p-2 ) stored in the next preceding step and generating a second binary sign comparison signal (picd), and validating the previous sample (Y p-1 ) as a reference (R m ) and storing said new reference when the following initialization conditions are satisfied: the sign comparison signal (picd) is representative of a sign inversion, and at least one of said comparison signals is representative of one of the following inequalities: |y.sub.p-1 -E.sub.n-1 |<a d<dmin
Claim 4
Dependent Claim 45 words
A treatment process as in claim 2, and including pursuing said iterative initialization treatment (t i ) parallel to the extremum detection treatment (t 2 ) in order to furnish new extremum references in case the disappearance of the significant component of the treated signal.
Claim 5
Dependent Claim 145 words
A treatment process as in claims 3, and including: (t 0 ) in said preliminary step, storing the following parameter: the ratio K of the differences of values between successive extremums, (t 2 ) detecting the extremums while adding to the current sequence the following operations: storing at the same time as the extremum (E n-1 ) the relative height (H n-1 ) of said extremum with respect to that of the preceding extremum (E n-2 ), comparing the difference |y p-1 -E n-1 | to the value of H 1-n x K, where K is the previously stored ratio, and generating a fourth binary comparison signal (sd 8 ), validating the sample (y p-1 ) as a new extremum (E n ) and storing it, only when said validation conditions are satisfied and, otherwise, where the following inequality is also satisfied: |y.sub.p-1 -E.sub.n-1 |>K.H.sub.n-.
Claim 6
Dependent Claim 116 words
A treatment process as in claim 4, and including carrying out said iterative initialization treatment (t i ) while validating and storing at each initialization sequence the sample (y p-1 ) as a reference (R m ) in the case in which the following initialization conditions are satisfied: the sign comparison signal (picd) is representative of a sign inversion, and at least one of said comparison signals is representative of one of the following inequalities: |y.sub.p-1 -E.sub.n-1 |<a d<dmin |y.sub.p-1 -E.sub.n-1 |<K.H.sub.n-1 where K is the ratio previously stored, E n-1 is the last valid extremum or zero for want of a valid extremum, and H n-1 the relative height of said last extremum or zero.
Claim 7
Dependent Claim 100 words
A process as in claim 2, and including: (t 0 ) in said preliminary step, storing the following parameter: distance --dmax-- between successive extremums, (t 1 ) generating the references while adding to the current initialization sequence the following operations: comparing the distance --d-- to the maximum distance --dmax-- for generating a binary comparison signal (sd 7 ) representative of the relative values of --d-- and --dmax--, validating the sample (y p-1 ) as a new reference (R m ) and storing it when said initialization conditions are satisfied, or when said comparison signal is representative of the equality d=dmax.
Claim 8
Dependent Claim 66 words
A treatment process as in claim 6 and wherein in the detection of the extremums (t 2 ), if at one sequence said comparison signal becomes representative of the inequality d≧dmax, counting down the number of steps separating the preceding extremum E n-1 from the following extremum E n and storing the distance --de-- separating the extremum (E n-1 ) from the extremum (E n ).
Claim 9
Dependent Claim 54 words
A treatment process as in claim 7, characterized in that (t 2 ) in the case of a comparison signal representative of the inequality d≧dmax, after detection of the extremum E n =y p-1 , storing at the same time as the distance --de--, the sign of said difference (y p -y p-1 ).
Claim 10
Dependent Claim 78 words
A treatment process as in claim 8, characterized in that if during the detection of the extremums (t 2 ), said comparison signal becomes representative of the equality d=dmax, carrying out a segmenting treatment (t 3 ) while considering as the last extremum E n the sample Y p-1 separated from the preceding extremum E n-1 by a distance d=dmax in order to consider the average sample of this last sequence during the generation of said binary signal.
Claim 11
Dependent Claim 117 words
A treatment process as in claim 2, and including: (t 0 ) in the preliminary stage, storing the following parameter: the difference in maximum amplitude Vmax between two successive samples, (t 2 ) detecting the extremums while adding to the current sequence (n) the following operations: calculating the absolute value of the difference |y p-1 -y p |, comparing it to the difference in maximum amplitude preliminarily stored and generating a binary comparison signal (sd 4 ), validating said previous sample (y p-1 ) as a new extremum (E n ) and storing it only when said validation conditions are satisfied and otherwise when said comparison signal is representative of the inequality |y p-1 -y p |<Vmax.
Claim 12
Dependent Claim 104 words
A treatment process as in claim 10 and including (t i ) in the initialization treatment, detecting the references while adding to the current initialization sequence the following operations: calculating the absolute value of the difference |y p-1 -y p |, comparing it to the difference in maximum amplitude Vmax preliminary stored, and generating a binary comparison signal (sd 4 ), validating said previous sample (y p-1 ) as a reference (R m ) and storing it in the case in which the aforesaid initialization conditions are satisfied and further where said comparison signal is representative of the inequality |y p-1 -y p |<Vmax.
Claim 13
Dependent Claim 93 words
A process as in claims 2 for the treatment of an analog signal representative of an image, associated with synchronization pulses of pixels and synchronization pulses of the beginning and the end of lines, and including: (t 1 ) causing the sampling frequency of the analog/numeric conversion to correspond with the pixel pulse synchronization frequency or a multiple thereof, (t i ) commencing the iterative initialization treatment at each synchronization pulse for the beginning of a line, (t 2 , t 3 ) stopping the treatment at each end of line synchronization pulse.
Claim 14
Dependent Claim 137 words
A process as in claim 1 and including (t 2 ) detecting the extremums while adding after validation of a first extremum the following operation to each sequence (n): calculating at the end of the preceding sequence (n-1) the current sequence considered (n), the sign of the difference E n-1 -E n-2 and storing it (sd 1 ), calculating at each step of the current sequence (n) the sign of the difference y p-1 -E n-1 (sd 3 ), comparing the sign of the difference y p-1 -E n-1 with that of the difference E n-1 -E n-2 and generating a binary comparison signal of the sign (pics), validating the sample only in the case in which the validation conditions heretofore stated are satisfied and in which said sign comparison signal is representative of a sign inversion.
Claim 15
Dependent Claim 99 words
A process as in claim 13, characterized in that (t 2 ) in the case in which said previous sample (Y p-1 ) is not valid by reason of an identity of the sign of the values (Y p-1 -E n-1 ) and (E n-1 -E n-1 ), storing said previous sample (Y p-1 ) to serve as a reference in said segmenting treatment (t 3 ), said reference (Y p-1 ) being substituted for said extremum (E n-1 ) for operating the summing function, searching for the average sample and calculating the distance (l' n-1 +l n ).
Claim 16
Dependent Claim 25 words
A treatment process as in claim 1 and including (t 3 ) in the segmenting treatment, operating the following summing function on the extremums: ##EQU2##
Claim 17
Dependent Claim 63 words
A treatment process as in claim 1 and including (t 3 ) in the segmentation treatment, searching for the average sample by a dichotomizing process comprising considering the sample situated in the middle of the segment E n-1 E n , comparing its value with the threshold (S), and thereby approaching by successive iterations the sample having the value closest to the threshold.
Claim 18
Dependent Claim 84 words
A treatment process as in claim 1 comprising a phase of the recognition of the presence of a significant component, preceding the generation of the parametrable binary signal, and further comprising: (t' 2 ) detecting sequentially the extremums by the sequences such as already defined, and (t 5 ) counting and storing the number of valid extremums with respect to a window corresponding to a predetermined number of samples, for delivering a datum representative of the probable presence or absence of a significant component.
Claim 19
Independent Claim 478 words
An apparatus for treatment of an analog electric signal for delivering a parametrable binary signal comprising: an assembly of parameter storage registers (MP) having storage registers (MP a , MP dmin ) for storing noise (a) and minimum distance (dmin), an analog/numeric converter (CAN) arranged to carry out the conversion at a predetermined sampling frequency, a sequence (SEQ) adapted to control the cycles of operation to be carried out at each sampling period by a sequential validation of each functional unit of the apparatus, an extremum detection circuit (PIC) having: first and second registers (Y, Y') for the storage of successive samples, said first register (Y) being connected to the converter (CAN), said second register being connected to said first register, a third register (E) for the storage of the extremum and connected to the second register (Y'), a first operator (OD 1 ) for calculating difference, connected to the first and second registers (Y, Y') and associated with a sign storage flip flop (MD 1 ), a second difference calculating operator (OD 2 ) connected to the second and third registers (Y', E), a first comparator (CD 1 ) connected to the operator (OD 2 ) and to one of said noise storage registers (MP a ), a counter (COMP 1 ) adapted to be incremented to the sampling frequency and reset to zero upon each extremum validation, a second comparator (CD 2 ) connected to the output of the counter (COMP 1 ) and to one of said minimum distance storage registers (MP dmin ), a combinatorial calculating operator connected at its input to said first operator (OD 1 ), to said storage flip flop (MD 1 ), to said first comparator (CD 1 ) and to said second comparator (CD 2 ), and at its output to said sequencer for delivering thereto an extremum validation signal (pivc), a segmentation circuit (BIN) comprising: a temporary storage memory (MS 1 ) for samples of a sequence, connected to one of the sample storage registers (Y'), extremum storage means (MS 2 ), a third operator (OS 1 ) for summing the amplitudes of two successive extremums and associated with a threshold storage register (MS 3 ), an heuristic searching unit (DICHO) for samples closest to the threshold and connected to said temporary storage memory (MS 1 ), to said threshold register (MS 3 ) and to said extremum storage means (MD 2 ), a distance calculating operator (OS 2 ) connected to said heuristic searching (DICHO) unit and to the extremum storage means (MS 2 ) and associated with a temporary distance storage register (MS 4 ), a summation operator connected to said heuristic searching unit (DICHO) and to said temporary distance storage register (MS 4 ) for calculating the length of a segment between successive median samples, and a result memory for storing the results furnished thereto.
Claim 20
Independent Claim 478 words
An apparatus for treatment of an analog electric signal for delivering a parametrable binary signal comprising: an assembly of parameter storage registers (MP) having storage registers (MP a , MP dmin ) for storing noise (a) and minimum distance (dmin), an analog/numeric converter (CAN) arranged to carry out the conversion at a predetermined sampling frequency, a sequence (SEQ) adapted to control the cycles of operation to be carried out at each sampling period by a sequential validation of each functional unit of the apparatus, an extremum detection circuit (PIC) having: first and second registers (Y, Y') for the storage of successive samples, said first register (Y) being connected to the converter (CAN), said second register being connected to said first register, a third register (E) for the storage of the extremum and connected to the second register (Y'), a first operator (OD 1 ) for calculating difference, connected to the first and second registers (Y, Y') and associated with a sign storage flip flop (MD 1 ), a second difference calculating operator (OD 2 ) connected to the second and third registers (Y', E), a first comparator (CD 1 ) connected to the operator (OD 2 ) and to one of said noise storage registers (MP a ), a counter (COMP 1 ) adapted to be incremented to the sampling frequency and reset to zero upon each extremum validation, a second comparator (CD 2 ) connected to the output of the counter (COMP 1 ) and to one of said minimum distance storage registers (MP dmin ), a combinatorial calculating operator connected at its input to said first operator (OD 1 ), to said storage flip flop (MD 1 ), to said first comparator (CD 1 ) and to said second comparator (CD 2 ), and at its output to said sequencer for delivering thereto an extremum validation signal (pivc), a segmentation circuit (BIN) comprising: a temporary storage memory (MS 1 ) for samples of a sequence, connected to one of the sample storage registers (Y'), extremum storage means (MS 2 ), a third operator (OS 1 ) for summing the amplitudes of two successive extremums and associated with a threshold storage register (MS 3 ), an heuristic searching unit (DICHO) for samples closest to the threshold and connected to said temporary storage memory (MS 1 ), to said threshold register (MS 3 ) and to said extremum storage means (MD 2 ), a distance calculating operator (OS 2 ) connected to said heuristic searching (DICHO) unit and to the extremum storage means (MS 2 ) and associated with a temporary distance storage register (MS 4 ), a summation operator connected to said heuristic searching unit (DICHO) and to said temporary distance storage register (MS 4 ) for calculating the length of a segment between successive median samples, and a result memory for storing the results furnished thereto.
Claim 21
Dependent Claim 110 words
A treatment apparatus of claim 18, and including an initialization circuit (INIT) associated with the extremum detection circuit (PIC), said initialization circuit having a second combinatorial calculation operator (OI 1 ) arranged in parallel with respect to the operator (OD 3 ) of said extremum detection circuit (PIC), said second combinatorial calculation operator (OI 1 ) being connected at its input to said first and second comparators (CD 1 , CD 2 ), to said operator (OD 1 ) and to said sign storage flip flop (MD 1 ) for delivering to the extremum storage register (E) a reference validation signal (Ref) for storing in said register each valid reference.
Claim 22
Dependent Claim 115 words
A treatment apparatus as in claim 19 and wherein the assembly of parameter storage registers comprises a difference ratio storage register (MP k ), and said extremum detection circuit (PIC) includes: a register (MD 2 ) for storage of relative extremum height, a division operator (OD 4 ) connected at its input to said relative extremum storage register (MD 2 ) and to said ratio storage register (MP k ) for delivering a divided relative height, and a third comparator (CD 3 ) connected at its input to said second operator and said division operator for delivering to said operator (OD 3 ) of said extremum detection circuit a supplementary comparison signal (sd 8 ).
Claim 23
Dependent Claim 41 words
A treatment apparatus as in claim 20 and wherein said third comparator (CD 3 ) is also connected to said second combinatorial calculation operator (OI 1 ) of the initialization circuit for delivering said supplementary comparison signal (sd 8 ) thereto.
Claim 24
Dependent Claim 89 words
A treatment apparatus as in claim 21 and wherein said extreme detection circuit (PIC) comprises a flip flop (MD 3 ) for storing the sign of the difference, connected to said second operator (OD 2 ) for delivering to said operator of said extremum detection circuit (OD 3 ) said stored sign of the difference (sd 1 ), said second operator (OD 2 ) being connected at its output to said operator of said extremum detection circuit (OD 3 ) to furnish thereto the current sign (sd 3 ).
Claim 25
Dependent Claim 54 words
A treatment apparatus as in claim 22 and wherein said storage flip flop (MD 3 ) and said second operator (OD 2 ) are both connected to said operator (OI 1 ) of the initialization circuit in order for delivering thereto the stored sign (sd 1 ) and the current sign (sd 3 ).
Claim 26
Dependent Claim 77 words
A treatment apparatus as in claim 19 and wherein the assembly of parameter storage registers comprises a maximum distance storage register (MP max ), and the extremum detection circuit (PIC) includes a first counter (COMP 2 ) connected to said maximum distance storage register (MP dmax ) for loading its counted value for delivering to said operator of said extremum detection circuit (OD 3 ) a comparison signal in the event of exceeding said supplementary comparison signal.
Claim 27
Dependent Claim 81 words
A treatment apparatus as in claim 24 and wherein the assembly of parameter storage registers includes an amplitude difference storing register (MP vmax ), and the extremum detection circuit (PIC) includes a fourth comparator (CD 4 ) connected at its input to the operator of said extremum detection circuit (OD 1 ) and to said difference storing register (MP vmax ) for delivering a supplementary comparison signal (sd 4 ) to said operator of the extremum detection circuit (OD 3 ).
Claim 28
Dependent Claim 38 words
A treatment apparatus as in claim 25 and wherein said fourth comparator (CD 4 ) is also connected to said operator (OI 1 ) of the initialization circuit for delivering thereto a supplementary comparison signal (sd 4 ).
Claim 29
Dependent Claim 249 words
A treatment apparatus as in claim 18 and wherein said heuristic searching unit (DICHO) of the segmenting circuit is a dichotomic searching unit comprising: lower and upper limit storage registers (MS i , MS s ), a summation operator (OS 4 ) connected at its input to said limit storage registers (MS i , MS s ) for carrying out a median address calculation, and at its output to an intermediate storage register (MS a ) connected to said sample memory (MS 1 ) for addressing it with a sample, said summation operator (OS 4 ) associated with said intermediate storage register (MS a ) being coupled to said limit storage registers (MS i , MS s ), a sign storage register (MS g ) connected to said second difference calculating operator (OD 2 ), a sample receiving comparator (CS 1 ) connected to said sign storage register (MS g ), said sample memory (MS 1 ) for receiving the sample addressed, and to the threshold storage register (MS 3 ), for delivering a comparison signal (sdicho), a segmenting sequencer (SEQDICHO) connected at its input to said sample receiving comparator (CS 1 ) and at its output to said limit storage registers (MS i , MS s ) for validating one of the stored limits, and a fifth comparator (CS 2 ) connected to said limit storage registers (MS i , MS s ) for delivering a sign of equality to said sequencer (SEQDICHO) for stopping the dichotomic search.
Claim 30
Dependent Claim 43 words
A treatment apparatus as in claim 18 and comprising a programmable phase generator (GENE) for delivering a parametrable sampling frequency to the converter (CAN) and synchronization pulses for the analog signal of a parametrable frequency equal to the sampling frequency or submultiples thereof.
Claim 31
Dependent Claim 65 words
A treatment apparatus as in claim 18 and including a valid extremum counting circuit (NBPIC) comprising a second counter (COMP 4 ) for counting the number of valid extremums and a third counter (COMP 5 ) for counting the number of samples and arranged to deliver and store the contents of said second counter (COMP 4 ) after passage of a predetermined number of samples.

References Cited (Backward Citations)

US4329574A Cited
US4560977A Cited
US4757464A Cited
US4819197A Cited

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