Phase locked loop that includes D. C. modulation

Claim 2

An electrical device (220) which comprises: reference frequency oscillator means (24) for supplying a reference frequency; phase locking oscillator means (222) comprising a loop (12) with a forward path (14) that includes a comparator (26) being connected to said reference frequency oscillator means, and a variable frequency oscillator (22) that is operatively connected to said comparator, and with a feedback path (16) that feeds a feedback signal, related to an output (23) from said variable frequency oscillator, to an input (29) of said comparator, for phase locking said loop to said reference frequency; quadrature signal generating means (226), being operatively connected to a source (64) of modulation frequencies, for generating first and second quadrature frequencies from said modulation frequencies; and mixing means (234), having first (244) and second (246) quadrature input terminals that are operatively connected to respective ones of said quadrature frequencies, and being interposed into said feedback path with a third input terminal (260) that is operatively connected to said feedback path proximal to said variable frequency oscillator, and with an output terminal (262) that is operatively connected to said feedback path distal from said variable frequency oscillator, for mixing said quadrature frequencies with a signal derived from said output of said variable frequency oscillator.

Claim 3

An electrical device (220) as claimed in claim 1 in which said electrical device comprises means (88) for operatively connecting said source (64) of modulation frequencies to a modulation signal; and said device comprises means (84) being operatively connected (88) to said modulation signal and to said variable frequency oscillator (22), for modulating said forward path (14) as a function of said modulation signal.

Claim 4

An electrical device (220) as claimed in claims 1 or 2 in which said mixing of said quadrature frequencies with said frequency in said feedback path (16) comprises means for subtracting one of said quadrature frequencies from said frequency in said feedback path.

Claim 5

An electrical device (220) as claimed in claims 1 or 2 in which said mixing means (234) comprises means for developing both sidebands, and for attenuating one of said sidebands.

Claim 6

An electrical device (220) as claimed in claims 1 or 2 in which said quadrature signal generating means (226) comprises first (228) and second (164) flip-flops that are operatively connected to said source (64) of modulation frequencies.

Claim 7

An electrical device (220) as claimed in claims 1 or 2 in which said mixing means comprises a quadrature phase shift keying mixer (234).

Claim 8

An electrical device (220) as claimed in claim 1 in which said quadrature signal generating means (226) comprises first (228) and second (164) flip-flops that are operatively connected to said source (64) of modulation frequencies; said mixing means comprises a quadrature phase shift keying mixer (234); and said operative connection of said mixing means to said quadrature frequencies comprises first (230) and second (232) filters that connect said flip-flops (228 and 164) to said quadrature phase shift keying mixer.

Claim 9

An electrical device (220) as claimed in claim 1 in which said source of modulation frequencies comprises a voltage controlled oscillator (64); said quadrature signal generating means (226) comprises a first flip-flop (228) having a first D terminal (238), a first Q terminal (236), and a first clock terminal (242), and a second flip-flop (164) having a second D terminal (170) that is connected to said first Q terminal, a second clock terminal (176), a second Q terminal (172) that is connected to said first D terminal, and a NOT-Q terminal (174); said operative connection of said quadrature signal generating means to said source (64) of modulation frequencies comprises connection of said source to both of said clock terminals (242 and 176); said mixing means comprises a quadrature phase shift keying mixer (234); said operative connection of said mixing means to said first and second quadrature frequencies comprises a first filter (230) that operatively interconnects said first Q terminal to one (244) of said quadrature input terminals, and a second filter (232) that operatively connects said second Q terminal to the other (246) of said quadrature input terminals; said electrical device comprises means (88) for operatively connecting said source (64) of modulation frequencies to a modulation signal; and said device comprises means (84) being operatively connected (88) to said modulation signal and to said variable frequency oscillator (22), for modulating said forward path (14) as a function of said modulation signal.

Claim 10

An electrical device (264) which comprises: reference frequency oscillator means (24) for supplying a reference frequency; phase locking oscillator means (266) comprising a loop (12) with a forward path (14) that includes a comparator (26) being connected to said reference frequency oscillator means, and a variable frequency oscillator (22) that is operatively connected to said comparator, and with a feedbak path (16) that feeds a feedback signal, related to an output (23) from said variable frequency oscillator, to an input (29) of said comparator, for phase locking said loop to said reference frequency; dual modulus divider means (34), being interposed into said feedback path, for dividing a signal derived from said output of said variable frequency oscillator by lower and higher dividing ratios; modulus controller means (50), being connected to said dual modulus divider means, and comprising "A" and "N" inputs, for making said dual modulus divider means divide at one of said ratios "A" times and divide at the other of said ratios "N" times; a source (64) of modulation frequencies; means (272), being operatively connected to said source of modulation frequencies and to one of said inputs to said modulus controller means, for changing, as a function of said modulation frequencies, the number of times that said dual modulus divider means divides at one of said dividing ratios; and said operative connection of said changing means to said source of modulation frequencies and to said one input of said modulus controller means comprises synchronizer means (270) for synchronizing said changing of dividing ratios with completion of a division at one of said dividing ratios.

Claim 11

An electrical device (264) which comprises: reference frequency oscillator means (24) for supplying a reference frequency; phase locking oscillator means (266) comprising a loop (12) with a forward path (14) that includes a comparator (26) being connected to said reference frequency oscillator means, and a variable frequency oscillator (22) that is operatively connected to said comparator, and with a feedbak path (16) that feeds a feedback signal, related to an output (23) from said variable frequency oscillator, to an input (29) of said comparator, for phase locking said loop to said reference frequency; dual modulus divider means (34), being interposed into said feedback path, for dividing a signal derived from said output of said variable frequency oscillator by lower and higher dividing ratios; modulus controller means (50), being connected to said dual modulus divider means, and comprising "A" and "N" inputs, for making said dual modulus divider means divide at one of said ratios "A" times and divide at the other of said ratios "N" times; a source (64) of modulation frequencies; means (272), being operatively connected to said source of modulation frequencies and to one of said inputs to said modulus controller means, for changing, as a function of said modulation frequencies, the number of times that said dual modulus divider means divides at one of said dividing ratios; and said operative connection of said changing means to said source of modulation frequencies and to said one input of said modulus controller means comprises synchronizer means (270) for synchronizing said changing of dividing ratios with completion of a division at one of said dividing ratios.

Claim 12

An electrical device (264) as claimed in claim 9 in which said electrical device comprises means (88) for operatively connecting said source (64) of modulation frequencies to a modulation signal; and said device comprises means (84) being operatively connected (88) to said modulation signal and to said variable frequency oscillator (22), for modulating said forward path (14) as a function of said modulation signal.

Claim 13

An electrical device (264) as claimed in claim 9 or 10 in which said one ratio comprises said lower dividing ratio.

Claim 14

An electrical device (264) as claimed in claims 9 or 10 in which said means for changing the number of times that said dual modulus divider means (34) divides at one of said ratios comprises means for increasing the number of times that said dual modulus divider means divides at said one ratio.

Claim 15

An electrical device (264) as claimed in claim 9 in which said one ratio comprises said lower dividing ratio; and said means for changing the number of times that said dual modulus divider means (34) divides at one of said ratios comprises means for increasing the number of times that said dual modulus divider means divides at said lower dividing ratio.

Claim 16

An electrical device (264) as claimed in claims 9 or 10 in which said means for changing the number of times that said dual modulus divider means (34) divides at one of said dividing ratios comprises a parallel adder (272) that is operatively connected to said source (64) of modulation frequencies and to one ("A") of said inputs of said modulus controller means (50).

Claim 17

An electrical device (264) as claimed in claims 9 or 10 in which said synchronizer means (270) comprises a first flip-flip (102) that is operatively connected to said source (64) of modulation frequencies, and a second flip-flop (274) that is operatively connected to said first flip-flop and to said changing means.

Claim 18

An electrical device (264) as claimed in claim 9 in which said means for changing the number of times that said dual modulus divider means (34) divides at one of said dividing ratios comprises a parallel adder (272); and said synchronizer means (270) comprises a first flip-flop (102) that is operatively connected to said source (64) of modulation frequencies, and a second flip-flop (274) that is operatively connected to said first flip-flop and to said parallel adder (272).

Claim 19

An electrical device (264) as claimed in claim 9 in which said means for changing the number of times that said dual modulus divider means (34) divides at one of said dividing ratios comprises a parallel adder (272) having a control terminal (284); said synchronizer means (270) comprises first (102) and second (274) flip-flops; said first flip-flop (102) comprises a first D terminal (276) that is connected to a source of a logical high, a first Q terminal (110), a first clock terminal (108), and a reset terminal (114); said second flip-flop (274) comprises a second D terminal (278) that is connected to said first Q terminal, a second Q terminal (282) that is connected to said reset terminal of said first flip-flop and to said control terminal of said parallel adder, and a second clock terminal (280) that is connected to both said dual modulus divider means and to said modulus controller means (50); said electrical device comprises means (88) for operatively connecting said source (64) of modulation frequencies to a modulation signal; and said device comprises means (84) being operatively connected (88) to said modulation signal and to said variable frequency oscillator (22), for modulating said forward path (14) as a function of said modulation signal.

Claim 22

A method as claimed in claim 18 in which said step of accessing modulation frequencies comprises accessing a modulation signal; and said method comprises using said modulation signal to D.C. modulate said forward path substantially simultaneously with said mixing step.

Claim 25

A method as claimed in claim 18 in which said mixing step comprises developing both sidebands, using the one of said sidebands that reduces the frequency in said feedback path subsequent to said mixing step, and attenuating the other of said sidebands.

Claim 26

A method as claimed in claim 18 or 19 in which said method comprises filtering said quadrature frequencies prior to said mixing step.

Claim 27

A method as claimed in claim 18 in which said method comprises filtering said quadrature frequencies prior to said mixing step; said mixing step comprises developing both sidebands, using the one of said sidebands that reduces the frequency in said feedback path subsequent to said mixing step, and attenuating the other of said sidebands; said step of accessing modulation frequencies comprises accessing a modulation signal; and said method comprises using said modulation signal to D.C. modulate said forward path substantially simultaneously with said mixing step.

Claim 30

A method as claimed in claim 25 in which said step of accessing modulation frequencies comprises accessing a modulation signal; and said method further comprises using said modulation signal to D.C. modulate said forward path substantially simultaneously with said using step.

Claim 33

A method as claimed in claim 25 in which said using step comprises using said modulation frequencies to increase the number of times that said dividing step is performed at said lower dividing ratio.

Claim 34

A method as claimed in claim 25 in which said using step comprises placing one pulse from said modulation frequencies in a holding location, releasing said held pulse from said holding location when one division is completed, using said released pulse to change said number of times said dividing step is performed at said one ratio, and using said released pulse to empty said holding location.

Claim 35

A method as claimed in claim 25 in which said using step comprises placing one pulse from said modulation frequencies in a holding location, releasing said held pulse from said holding location when one division is completed, using said released pulse to increase the number of times said dividing step is performed at said lower ratio, and using said released pulse to empty said holding location; said step of accessing modulation frequencies comprises accessing a modulation signal; and said method further comprises using said modulation signal to D.C. modulate said forward path substantially simultaneously with said using step.