Patent US5097196A successfully refreshed from Google Patents.
US5097196A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Zero-voltage-switched multiresonant DC to DC converter
Assignee: Boeing North American Inc
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Filing: 1991-05-24
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Granted: 1992-03-17
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Expires: 2011-05-24
Abstract
Abstract A multiresonant DC to DC converter which operates at a substantially fixed frequency yet maintains relatively constant efficiency levels despite wide variations in input voltage. The multiresonant converter includes a first transistor switch in series with the DC voltage supply source and the load and a second transistor switch in parallel with the DC voltage supply source and the load. The switching action of the first transistor switch is controlled as a function of the supply voltage input to the converter while the duty factor of the second transistor switch is controlled in accordance with the output voltage of the converter.
Inventors
- 👤 George K. Schoneman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 13:57
CPC Classifications
H; H02; H02M; H02M3/00; H02M3/02; H02M3/04; H02M3/10; H02M3/145; H02M3/155; H02M3/156; H02M3/158; H02M3/1582; Y; Y02; Y02B; Y02B70/00; Y02B70/10
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
172 words
A zero-voltage-switched multiresonant converter for generating a regulated DC output voltage for supply to a load from a DC input voltage provided by a DC voltage source, comprising: a first transistor switch connected in series with said DC voltage source and said load; a second transistor switch connected in parallel with said DC voltage source and said load; a first capacitor connected in parallel with said first transistor switch; a second capacitor connected in parallel with said second transistor switch; a first inductor connected in series with said DC voltage source, said load and both of said first and second transistors switches; means coupled to the gate of said first transistor switch for controlling switching of said first transistor switch as a function of the input voltage provided by said voltage source to said converter for stabilizing the current through said first inductor; and means coupled to the gate of said second transistor switch for controlling switching of said second transistor switch as a function of the output voltage of said converter.
Claim 2
Dependent Claim
172 words
A zero-voltage-switched multiresonant converter for generating a regulated DC output voltage for supply to a load from a DC input voltage provided by a DC voltage source, comprising: a first transistor switch connected in series with said DC voltage source and said load; a second transistor switch connected in parallel with said DC voltage source and said load; a first capacitor connected in parallel with said first transistor switch; a second capacitor connected in parallel with said second transistor switch; a first inductor connected in series with said DC voltage source, said load and both of said first and second transistors switches; means coupled to the gate of said first transistor switch for controlling switching of said first transistor switch as a function of the input voltage provided by said voltage source to said converter for stabilizing the current through said first inductor; and means coupled to the gate of said second transistor switch for controlling switching of said second transistor switch as a function of the output voltage of said converter.
Claim 3
Dependent Claim
22 words
The zero-voltage-switched multiresonant converter of claim 1, wherein said first and second transistor switches comprise metal oxide semiconductor field affect transistors (MOSFETs).
Claim 4
Dependent Claim
51 words
The zero-voltage-switched multiresonant converter of claim 2, wherein said means for controlling the switching of said first transistor switch is further operative for regulating the switching of said first transistor switch to Provide a fixed off time and a variable on time which is an inverse function of said input voltage.
Claim 5
Dependent Claim
134 words
The zero-voltage-switched multiresonant converter of claim 3, wherein said means for controlling said first transistor switch includes: a third capacitor which is connected at one terminal through a resistor to said voltage source so as to allow a substantially constant current to be supplied to said capacitor and which is connected at its other terminal to ground, means for comparing the voltage across said third capacitor to a fixed reference level and generating an off control signal for supply to said first transistor switch when said voltage across said comparator exceeds said fixed reference level, and means for discharging said capacitor to ground upon the expiration of a fixed time period after said voltage across said capacitor exceeds said fixed reference level and said off control signal is supplied to said first transistor switch.
Claim 6
Dependent Claim
78 words
The zero-voltage switched multiresonant converter of claim 3, wherein said means for controlling the switching of said second transistor switch includes: an error amplifier for comparing said output voltage of said converter to a reference voltage in order to generate an error signal, and comparator means for comparing said error signal to the voltage across said capacitor in order to produce a pulse width modulated control signal for use in controlling the switching of said second transistor switch.
Claim 7
Dependent Claim
130 words
A process for controlling the switching action in a zero-voltage-switched multiresonant DC to DC converter which is operative for generating a regulated output voltage for supply to a load from an unregulated input voltage supplied by a voltage source and which includes a first transistor switch in series with said load and a second transistor switch in parallel with said load, said process comprising the steps of: regulating the duty factor of said first transistor switch as it is switched on and off at high frequency as an inverse function of the input voltage supplied by said voltage source; and regulating the duty factor of said second transistor switch as it is switched on and off at high frequency as a function of the output voltage supplied to said load.
Claim 8
Dependent Claim
130 words
A process for controlling the switching action in a zero-voltage-switched multiresonant DC to DC converter which is operative for generating a regulated output voltage for supply to a load from an unregulated input voltage supplied by a voltage source and which includes a first transistor switch in series with said load and a second transistor switch in parallel with said load, said process comprising the steps of: regulating the duty factor of said first transistor switch as it is switched on and off at high frequency as an inverse function of the input voltage supplied by said voltage source; and regulating the duty factor of said second transistor switch as it is switched on and off at high frequency as a function of the output voltage supplied to said load.
Claim 9
Dependent Claim
102 words
The process of claim 6, wherein said step of regulating the duty factor of said first transistor switch includes the substeps of: generating a sawtooth voltage signal having a ramp slope proportional to said input voltage by applying a corresponding input current to a capacitor and periodically discharging said capacitor, comparing said sawtooth voltage signal to a fixed reference voltage in order to produce a signal suitable for use in controlling said first transistor switch, and regulating the discharge of said capacitor to occur upon the expiration of a fixed time period from when said sawtooth voltage exceeds said fixed reference voltage.
Claim 10
Dependent Claim
20 words
The process of claim 6, wherein said first and second field effect transistors comprise metal oxide semiconductor field effect transistors.
Claim 11
Dependent Claim
148 words
A multiresonant converter for converting a DC input signal from a voltage supply source to a regulated DC output signal for supply to a load, said converter comprising: an input stage for receiving said DC input signal; an output stage for imposing said DC output signal across said load; a first transistor switch interposed between said input and output stages in series with said voltage supply source and said load; a second transistor switch interposed between said input and output stages in parallel with said voltage supply source and said load; reactive means interposed between said input and output stages for allowing said transistor switches to be switched on at zero-voltage levels; means for controlling the switching action of said first switch as a function of said DC input signal; means for controlling the switching action of said second switch as a function of said DC output signal.
Claim 12
Dependent Claim
148 words
A multiresonant converter for converting a DC input signal from a voltage supply source to a regulated DC output signal for supply to a load, said converter comprising: an input stage for receiving said DC input signal; an output stage for imposing said DC output signal across said load; a first transistor switch interposed between said input and output stages in series with said voltage supply source and said load; a second transistor switch interposed between said input and output stages in parallel with said voltage supply source and said load; reactive means interposed between said input and output stages for allowing said transistor switches to be switched on at zero-voltage levels; means for controlling the switching action of said first switch as a function of said DC input signal; means for controlling the switching action of said second switch as a function of said DC output signal.
Claim 13
Dependent Claim
44 words
The multiresonant converter of claim 9, wherein said reactive means includes: a first capacitor connected in parallel with said first transistor, a second capacitor connected in parallel with said second transistor, and an inductor connected in series with said first and said second transistors.
Claim 14
Dependent Claim
21 words
The multiresonant converter of claim 9, wherein said first and second transistor switches comprise metal oxide semiconductor field effect transistors (MOSFETs).
Claim 15
Dependent Claim
55 words
The zero-voltage-switched multiresonant converter of claim 10, wherein said means for controlling the switching of said first transistor switch is further operative for regulating the switching of said first transistor switch to provide a fixed off time and a variable on time which is an inverse function of the voltage of said DC input signal.
Claim 16
Dependent Claim
135 words
The zero-voltage-switched multiresonant converter of claim 10, wherein said means for controlling said first transistor switch includes: a third capacitor which is connected at one terminal through a resistor to said voltage supply source so as to allow a substantially constant current to be supplied to said capacitor and which is connected at its other terminal to ground, means for comparing the voltage across said third capacitor to a fixed reference level and generating an off control signal for supply to said first transistor switch when said voltage across said comparator exceeds said fixed reference level, and means for discharging said capacitor to ground upon the expiration of a fixed time period after said voltage across said capacitor exceeds said fixed reference level and said off control signal is supplied to said first transistor switch.
Claim 17
Dependent Claim
78 words
The zero-voltage switched multiresonant converter of claim 13, wherein said means for controlling the switching of said second transistor switch includes: an error amplifier for comparing said output voltage of said converter to a reference voltage in order to generate an error signal, and comparator means for comparing said error signal to the voltage across said capacitor in order to produce a pulse width modulated control signal for use in controlling the switching of said second transistor switch.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-03-17 | 1995-09-16 | 1996-03-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-03-17 | 1999-09-16 | 2000-03-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-03-17 | 2003-09-16 | 2004-03-17 | $7700.00 | Window Closed / Lapsed |