US5091322A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device and method of manufacturing the same
Assignee: Toshiba Corp
•
Filing: 1990-08-22
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Granted: 1992-02-25
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Expires: 2010-08-22
Abstract
Abstract A method of manufacturing a semiconductor device. A semiconductor substrate is prepared and a gate oxide film is formed on a surface of the semiconductor substrate. The gate oxide film is selectively removed to expose portions of the semiconductor substrate and a first polysilicon layer is formed on a resultant semiconductor structure. Impurities are implanted in the polysilicon layer and a resultant semiconductor structure is annealed to activate the impurities. The first polysilicon layer is patterned to form a base electrode of the bipolar transistor and a gate and/or drain electrode of the MOS transistor. An insulating layer is then formed on a resultant semiconductor structure. Portions of the semiconductor substrate are then selectively exposed and a second polysilicon layer is formed on a resultant semiconductor structure. The second polysilicon layer is then patterned to form an emitter electrode of the bipolar transistor.
Inventors
- 👤 Takeo Maeda
- 👤 Hiroshi Momose
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 15:09
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; H10D84/00; H10D84/01; H10D84/0107; H10D84/0109; H10D84/02; H10D84/03; H10D84/038; Y; Y10; Y10S; Y10S148/00; Y10S148/009
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
139 words
A method of fabricating a semiconductor device including a bipolar transistor and a MOS transistor, the method comprising the steps of: preparing a semiconductor substrate; forming a gate oxide film on a surface of said semiconductor substrate; selectively removing said gate oxide film to expose portions of said semiconductor substrate; forming a first polysilicon layer on a resultant semiconductor structure; implanting impurities in said first polysilicon layer; annealing a resultant semiconductor structure to activate the impurities; patterning said first polysilicon layer to form a base electrode of said bipolar transistor and a drain electrode of said MOS transistor; forming an insulating layer on a resultant semiconductor structure; selectively exposing portions of said semiconductor substrate; forming a second polysilicon layer on a resultant semiconductor structure; and patterning said second polysilicon layer to form an emitter electrode of said bipolar transistor.
Claim 2
Independent Claim
139 words
A method of fabricating a semiconductor device including a bipolar transistor and a MOS transistor, the method comprising the steps of: preparing a semiconductor substrate; forming a gate oxide film on a surface of said semiconductor substrate; selectively removing said gate oxide film to expose portions of said semiconductor substrate; forming a first polysilicon layer on a resultant semiconductor structure; implanting impurities in said first polysilicon layer; annealing a resultant semiconductor structure to activate the impurities; patterning said first polysilicon layer to form a base electrode of said bipolar transistor and a drain electrode of said MOS transistor; forming an insulating layer on a resultant semiconductor structure; selectively exposing portions of said semiconductor substrate; forming a second polysilicon layer on a resultant semiconductor structure; and patterning said second polysilicon layer to form an emitter electrode of said bipolar transistor.
Claim 3
Dependent Claim
21 words
The method according to claim 1 wherein said gate oxide film is formed to a thickness less than approximately 120 angstroms.
Claim 4
Dependent Claim
21 words
The method according to claim 1 wherein said second polysilicon layer is formed at a temperature less than approximately 600° C.
Claim 5
Dependent Claim
21 words
The method according to claim 1 wherein said first polysilicon layer is formed at a temperature less than approximately 600° C.
Claim 6
Independent Claim
155 words
A method of fabricating a semiconductor device including a bipolar transistor and a MOS transistor, the method comprising the steps of: preparing a semiconductor substrate; forming a gate oxide film on a surface of said semiconductor substrate; forming a first polysilicon layer on said gate oxide film; selectively removing said first polysilicon layer and gate oxide film to expose portions of said semiconductor substrate; forming a second polysilicon layer on a resultant semiconductor structure; implanting impurities in said second polysilicon layer; annealing a resultant semiconductor structure to activate the impurities; patterning said first and second polysilicon layers to form a base electrode of said bipolar transistor and a gate electrode of said MOS transistor; forming an insulating layer on a resultant semiconductor structure; selectively exposing portions of said semiconductor substrate; forming a third polysilicon layer on a resultant semiconductor structure; and patterning said third polysilicon layer to form an emitter electrode of said bipolar transistor.
Claim 7
Independent Claim
155 words
A method of fabricating a semiconductor device including a bipolar transistor and a MOS transistor, the method comprising the steps of: preparing a semiconductor substrate; forming a gate oxide film on a surface of said semiconductor substrate; forming a first polysilicon layer on said gate oxide film; selectively removing said first polysilicon layer and gate oxide film to expose portions of said semiconductor substrate; forming a second polysilicon layer on a resultant semiconductor structure; implanting impurities in said second polysilicon layer; annealing a resultant semiconductor structure to activate the impurities; patterning said first and second polysilicon layers to form a base electrode of said bipolar transistor and a gate electrode of said MOS transistor; forming an insulating layer on a resultant semiconductor structure; selectively exposing portions of said semiconductor substrate; forming a third polysilicon layer on a resultant semiconductor structure; and patterning said third polysilicon layer to form an emitter electrode of said bipolar transistor.
Claim 8
Dependent Claim
21 words
The method according to claim 5 wherein said gate oxide film is formed to a thickness less than approximately 120 angstroms.
Claim 9
Dependent Claim
21 words
The method according to claim 5 wherein said first polysilicon layer is formed at a temperature greater than approximately 610° C.
Claim 10
Dependent Claim
21 words
The method according to claim 5 wherein said second polysilicon layer is formed at a temperature less than approximately 600° C.
Claim 11
Dependent Claim
21 words
The method according to claim 5 wherein said third polysilicon layer is formed at a temperature less than approximately 600° C.
Claim 12
Independent Claim
155 words
A method of fabricating a semiconductor device including a bipolar transistor and a MOS transistor, the method comprising the steps of: preparing a semiconductor substrate; forming a gate oxide film on a surface of said semiconductor substrate; forming a first polysilicon layer on said gate oxide film; selectively removing said first polysilicon layer and gate oxide film to expose portions of said semiconductor substrate; forming a second polysilicon layer on a resultant semiconductor structure; implanting impurities in said second polysilicon layer; annealing a resultant semiconductor structure to activate the impurities; patterning said first and second polysilicon layers to form a base electrode of said bipolar transistor and a gate electrode of said MOS transistor; forming an insulating layer on a resultant semiconductor structure; selectively exposing portions of said semiconductor substrate; forming a third polysilicon layer on a resultant semiconductor structure; and patterning said third polysilicon layer to form an emitter electrode of said bipolar transistor.
Claim 13
Independent Claim
155 words
A method of fabricating a semiconductor device including a bipolar transistor and a MOS transistor, the method comprising the steps of: preparing a semiconductor substrate; forming a gate oxide film on a surface of said semiconductor substrate; forming a first polysilicon layer on said gate oxide film; selectively removing said first polysilicon layer and gate oxide film to expose portions of said semiconductor substrate; forming a second polysilicon layer on a resultant semiconductor structure; implanting impurities in said second polysilicon layer; annealing a resultant semiconductor structure to activate the impurities; patterning said first and second polysilicon layers to form a base electrode of said bipolar transistor and a gate electrode of said MOS transistor; forming an insulating layer on a resultant semiconductor structure; selectively exposing portions of said semiconductor substrate; forming a third polysilicon layer on a resultant semiconductor structure; and patterning said third polysilicon layer to form an emitter electrode of said bipolar transistor.
Claim 14
Dependent Claim
21 words
The method according to claim 10 wherein said gate oxide film is formed to a thickness less than approximately 120 angstroms.
Claim 15
Dependent Claim
21 words
The method according to claim 10 wherein said first polysilicon layer is formed at a temperature greater than approximately 610° C.
Claim 16
Dependent Claim
21 words
The method according to claim 10 wherein said second polysilicon layer is formed at a temperature less than approximately 600° C.
Claim 17
Dependent Claim
21 words
The method according to claim 10 wherein said third polysilicon layer is formed at a temperature less than approximately 600° C.
Claim 18
Independent Claim
112 words
A method of fabricating an electrode structure for a semiconductor device including a bipolar transistor and a MOS transistor having semiconductor regions formed in a semiconductor substrate, the method comprising the steps of: forming a first polysilicon layer in contact with a base region of said bipolar transistor and spaced from a channel region of said MOS transistor by an insulating film; patterning a base electrode of said bipolar transistor and a drain electrode of said MOS transistor from said first polysilicon layer; forming a second polysilicon layer in contact with an emitter region of said bipolar transistor; and patterning an emitter electrode of said bipolar transistor from said second polysilicon layer.
Claim 19
Independent Claim
112 words
A method of fabricating an electrode structure for a semiconductor device including a bipolar transistor and a MOS transistor having semiconductor regions formed in a semiconductor substrate, the method comprising the steps of: forming a first polysilicon layer in contact with a base region of said bipolar transistor and spaced from a channel region of said MOS transistor by an insulating film; patterning a base electrode of said bipolar transistor and a drain electrode of said MOS transistor from said first polysilicon layer; forming a second polysilicon layer in contact with an emitter region of said bipolar transistor; and patterning an emitter electrode of said bipolar transistor from said second polysilicon layer.
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