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US5090025A Expired / Lapsed US ⏱️ 0.0 years remaining

Token ring synchronization

Assignee: TDC Corp
•
Filing: 1990-07-24
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Granted: 1992-02-18
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Expires: 2010-07-24
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Abstract

Abstract An improved local area network node of the type described in ANSI/IEEE Standard 802.5, including a receiver-demodulator having an input connectable to the ring and having a received data output and a received clock output, an elasticity buffer connected to the received data output, a modulator for modulating the output of the buffer in accordance with a signal at a clocking input of the modulator, and a phase-locked loop interposed between the received clock output of the demodulator and the clocking input of the modulator, the loop including a voltage-controlled oscillator, a phase detector and a filter connected for providing a control-voltage to the oscillator.

Inventors

  • 👤 Alan C. Marshall
  • 👤 Stuart P. MacEachern
  • 👤 Howard C. Salwen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 21:58
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/227; H04L27/2271; H04L27/2272; H04L12/00; H04L12/28; H04L12/42; H04L12/422; H04L7/00; H04L7/02; H04L7/033

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 142 words
In a local network of the type described in ANSI/IEEE Standard 802.5, a node having a a ring monitor circuit and a reclocking circuit operably alternatively to one another, said network node including a receiver-demodulator incorporated a first phase locked loop and having an input connectable to the network and having an output providing received data and an output providing a received clock, an elasticity buffer connected to the received data output of said receiver-demodulator, and means for modulating said received data onto a clock signal extracted from said received clock, an improvement wherein said reclocking circuit includes: a second phase-locked loop connected in a transmission line between said received clock output of said receiver-demodulator and a received data input to said means for modulating, the bandwidth of said second phase-locked loop being narrower than the bandwidth of said first phase-locked loop.
Claim 2
Dependent Claim 142 words
In a local network of the type described in ANSI/IEEE Standard 802.5, a node having a a ring monitor circuit and a reclocking circuit operably alternatively to one another, said network node including a receiver-demodulator incorporated a first phase locked loop and having an input connectable to the network and having an output providing received data and an output providing a received clock, an elasticity buffer connected to the received data output of said receiver-demodulator, and means for modulating said received data onto a clock signal extracted from said received clock, an improvement wherein said reclocking circuit includes: a second phase-locked loop connected in a transmission line between said received clock output of said receiver-demodulator and a received data input to said means for modulating, the bandwidth of said second phase-locked loop being narrower than the bandwidth of said first phase-locked loop.
Claim 3
Dependent Claim 72 words
In a local area network node as set forth in claim 1 wherein said second phase-locked loop comprises phase detector means having its input connected for receiving said received clock from said received clock output of said demodulator, a voltage-controlled oscillator, and filter means having its input connected to the output of said phase detector means, the output of said filter means being connected as the voltage-controlling input to said voltage-controlled oscillator.
Claim 4
Dependent Claim 34 words
In a local area network node as set forth in claim 1 including an elasticity buffer connected between said received data output of said receiver-demodulator and a data input to said means for modulating.
Claim 5
Dependent Claim 36 words
In a local area network node as set forth in claim 2 wherein the characteristics of said filter means are selected so that said second phase-locked loop is narrower in bandwidth than said first phase-locked loop.
Claim 6
Dependent Claim 137 words
In a local area network of the type described in ANSI/IEEE Standard 802.5, having a set of reclocking nodes serially connected to a transmission medium so that information bits may be transferred sequentially from one active node to the next, an improvement wherein at least one of said reclocking nodes comprises: a receiver-demodulator including a first phase-locked loop and having an output providing received data and an output providing a received clock; an elasticity buffer having its input connected to said received data output and its output connected to the received data input of said means for modulating; means for modulating said received data onto a clock signal extracted from said received clock; and a second phase-locked loop connected between said received clock output of said receiver-demodulator and a received clock input to said means for modulating.
Claim 7
Dependent Claim 137 words
In a local area network of the type described in ANSI/IEEE Standard 802.5, having a set of reclocking nodes serially connected to a transmission medium so that information bits may be transferred sequentially from one active node to the next, an improvement wherein at least one of said reclocking nodes comprises: a receiver-demodulator including a first phase-locked loop and having an output providing received data and an output providing a received clock; an elasticity buffer having its input connected to said received data output and its output connected to the received data input of said means for modulating; means for modulating said received data onto a clock signal extracted from said received clock; and a second phase-locked loop connected between said received clock output of said receiver-demodulator and a received clock input to said means for modulating.
Claim 8
Dependent Claim 71 words
In a local area network node as set forth in claim 5 wherein said second phase-locked loop comprises phase detector means having its input connected for receiving received clock from said received clock output of said demodulator, a voltage-controlled oscillator, and filter means having its input connected to the output of said phase detector means, the output of said filter means being connected as the voltage-controlling input to said voltage-controlled oscillator.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-02-17 1995-08-19 1996-02-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-02-17 1999-08-19 2000-02-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-02-17 2003-08-19 2004-02-18 $7700.00 Window Closed / Lapsed

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