RF driven gate bias

Claim 2

A circuit for providing bias voltage to at least one amplifier transistor having an RF input signal, the circuit comprising: RF power divider means for providing a sample of the RF input signal; rectifier means for converting the sample into a DC voltage; regulator means responsive to the rectifier means for providing the bias voltage and limiting amplitude to ensure a relatively constant bias voltage over a relatively wide range of RF input signal amplitudes.

Claim 3

The circuit in accordance with claim 1, wherein said at least one amplifier transistor is a MOSFET.

Claim 4

The circuit in accordance with claim 2, wherein the MOSFET is an enhancement mode MOSFET.

Claim 5

The circuit in accordance with claim 1, wherein the RF power divider means comprises a tapped microstrip transmission line.

Claim 8

For a MOSFET RF power amplifier stage having an RF input signal, a method for providing an RF driven gate bias voltage derived from the RF input signal, the method comprising: (a) sampling the RF input signal to provide a sampled signal; (b) rectifying the sampled signal to provide a pulsating DC voltage; (c) filtering the pulsating DC voltage to provide a filtered DC voltage; and (d) regulating the filtered DC voltage to provide the RF driven gate bias voltage.

Claim 9

For a MOSFET RF power amplifier stage having an RF input signal, a method for providing an RF driven gate bias voltage derived from the RF input signal, the method comprising: (a) sampling the RF input signal to provide a sampled signal; (b) rectifying the sampled signal to provide a pulsating DC voltage; (c) filtering the pulsating DC voltage to provide a filtered DC voltage; and (d) regulating the filtered DC voltage to provide the RF driven gate bias voltage.