US5087307A
Expired / Lapsed
US
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Method of manufacturing semiconductor substrate
Assignee: Toshiba Corp
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Filing: 1990-12-03
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Granted: 1992-02-11
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Expires: 2010-12-03
Abstract
Abstract A method of manufacturing a semiconductor substrate comprises a first step of preparing one hundred silicon bodies each having two silicon wafers held together by cohesion after polishing and heating processes. The method further comprises a second step of stacking the silicon bodies in their thickness direction to form a stacked body, and a third step of cylindrically grinding the side surface of the stacked body by a predetermined amount.
Inventors
- 👤 Takehiko Nomura
- 👤 Yoshinori Natsume
- 👤 Yoshinori Hosoki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 19:43
CPC Classifications
H; H10; H10P; H10P90/00; H10P90/12; B; B24; B24B; B24B9/00; B24B9/02; B24B9/06; B24B9/065; H10D; H10D62/00; H10D62/10; H10D62/117; H10P10/00; H10P10/12; H10P10/128; Y; Y10; Y10T; Y10T156/00; Y10T156/10; Y10T156/1052; Y10T156/1062; Y10T156/1064
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
191 words
A method of manufacturing a semiconductor substrate comprising: a first step of polishing a pair of semiconductor wafers, each semiconductor wafer including a major surface having a central planar portion and an outer periphery and further including a side surface remote from the central planar portion and contiguous to the outer periphery, until the central planar portions of the major surfaces are mirror-finished and the outer peripheries are oblique to the respective central planar portions; a second step of stacking said semiconductor wafers with the polished surfaces opposed to each other, and heating the stacked semiconductor wafers to form a semiconductor body having a gap between the outer peripheries of the polished major surfaces of said semiconductor wafers formed by said polishing, stacking, and heating steps; a third step of preparing a plurality of semiconductor bodies each formed through said first and second steps; a fourth step of combining the plurality of semiconductor bodies atop each other to form a combined body having a side surface; and a fifth step of cylindrically grinding the side surface of the combined body by a predetermined amount required to at least remove said gap.
Claim 2
Independent Claim
191 words
A method of manufacturing a semiconductor substrate comprising: a first step of polishing a pair of semiconductor wafers, each semiconductor wafer including a major surface having a central planar portion and an outer periphery and further including a side surface remote from the central planar portion and contiguous to the outer periphery, until the central planar portions of the major surfaces are mirror-finished and the outer peripheries are oblique to the respective central planar portions; a second step of stacking said semiconductor wafers with the polished surfaces opposed to each other, and heating the stacked semiconductor wafers to form a semiconductor body having a gap between the outer peripheries of the polished major surfaces of said semiconductor wafers formed by said polishing, stacking, and heating steps; a third step of preparing a plurality of semiconductor bodies each formed through said first and second steps; a fourth step of combining the plurality of semiconductor bodies atop each other to form a combined body having a side surface; and a fifth step of cylindrically grinding the side surface of the combined body by a predetermined amount required to at least remove said gap.
Claim 3
Dependent Claim
58 words
A method according to claim 1, further comprising a sixth step of coating an adhesive on each semiconductor body before said fourth step, and a seventh step of removing said adhesive from the semiconductor bodies after said fifth step by reheating the stack, removing each semiconductor body from the stack, and washing each body with an organic solvent.
Claim 4
Dependent Claim
14 words
A method according to claim 2, wherein said adhesive is of a hot-melt type.
Claim 5
Dependent Claim
44 words
A method according to claim 3, wherein said fourth step includes a first substep of stacking each semiconductor body coated with the hot-melt adhesive on a heating plate heated up to a predetermined temperature, and a second substep of cooling the stacked semiconductor bodies.
Claim 6
Dependent Claim
38 words
A method according to claim 2, further comprising an eighth step of plane-grinding the side surface of said combined body after said fifth step and before said seventh step, thereby forming an orientation flat in each semiconductor body.
Claim 7
Dependent Claim
24 words
A method according to claim 5, further comprising a ninth step of adjusting each semiconductor body into a predetermined thickness after said seventh step.
Claim 8
Dependent Claim
26 words
A method according to claim 1, wherein each semiconductor wafer has a surface from which projections higher than 0.05 μm are removed, through said first step.
Claim 9
Dependent Claim
27 words
A method according to claim 1, wherein said second step includes a first substep of heating the stacked semiconductor wafers at a temperature higher than 200° C.
Claim 10
Dependent Claim
23 words
A method according to claim 8, wherein said first substep is performed at a temperature of about 1,100° C. for about two hours.
Claim 11
Independent Claim
216 words
A method of manufacturing a semiconductor substrate comprising: a first step of polishing a pair of semiconductor wafers, each semiconductor wafer including a major surface having a central planar portion and an outer periphery and further including a side surface remote from the central planar portion and contiguous to the outer periphery, until the central planar portions of the major surfaces are mirror-finished and the outer peripheries are oblique to the respective central planar portions; a second step of stacking said semiconductor wafers with the polished surfaces opposed to each other, and heating the stacked semiconductor wafers to form a semiconductor body having a gap between the outer peripheries of the polished major surfaces of said semiconductor wafers formed by said polishing, stacking, and heating steps; a third step of preparing a plurality of semiconductor bodies each formed through said first and second steps; a fourth step of combining the plurality of semiconductor bodies atop each other to form a combined body having a side surface; a fifth step of cylindrically grinding the side surface of the combined body by a predetermined amount required to at least remove said gap; and a sixth step of plane-grinding the side surface of said combined body after said fifth step, thereby forming an orientation flat in each semiconductor body.
Claim 12
Independent Claim
216 words
A method of manufacturing a semiconductor substrate comprising: a first step of polishing a pair of semiconductor wafers, each semiconductor wafer including a major surface having a central planar portion and an outer periphery and further including a side surface remote from the central planar portion and contiguous to the outer periphery, until the central planar portions of the major surfaces are mirror-finished and the outer peripheries are oblique to the respective central planar portions; a second step of stacking said semiconductor wafers with the polished surfaces opposed to each other, and heating the stacked semiconductor wafers to form a semiconductor body having a gap between the outer peripheries of the polished major surfaces of said semiconductor wafers formed by said polishing, stacking, and heating steps; a third step of preparing a plurality of semiconductor bodies each formed through said first and second steps; a fourth step of combining the plurality of semiconductor bodies atop each other to form a combined body having a side surface; a fifth step of cylindrically grinding the side surface of the combined body by a predetermined amount required to at least remove said gap; and a sixth step of plane-grinding the side surface of said combined body after said fifth step, thereby forming an orientation flat in each semiconductor body.
Claim 13
Dependent Claim
24 words
A method according to claim 10, further comprising a seventh step of adjusting each semiconductor body into a predetermined thickness after said sixth step.
Claim 14
Independent Claim
150 words
A method of manufacturing a semiconductor substrate comprising: a first step of polishing a pair of semiconductor wafers, each semiconductor wafer including a major surface having a central planar portion and an outer periphery and further including a side surface remote from the central planar portion and contiguous to the outer periphery, until the central planar portions of the major surfaces are mirror-finished and the outer peripheries are oblique to the respective central planar portions; a second step of stacking said semiconductor wafers with the polished surfaces opposed to each other, and heating the stacked semiconductor wafers to form a semiconductor body having a gap between the outer peripheries of the polished major surfaces of said semiconductor wafers formed by said polishing, stacking, and heating steps; and a third step of grinding the side surfaces of said semiconductor wafers by a predetermined amount required to at least remove said gap.
Claim 15
Independent Claim
150 words
A method of manufacturing a semiconductor substrate comprising: a first step of polishing a pair of semiconductor wafers, each semiconductor wafer including a major surface having a central planar portion and an outer periphery and further including a side surface remote from the central planar portion and contiguous to the outer periphery, until the central planar portions of the major surfaces are mirror-finished and the outer peripheries are oblique to the respective central planar portions; a second step of stacking said semiconductor wafers with the polished surfaces opposed to each other, and heating the stacked semiconductor wafers to form a semiconductor body having a gap between the outer peripheries of the polished major surfaces of said semiconductor wafers formed by said polishing, stacking, and heating steps; and a third step of grinding the side surfaces of said semiconductor wafers by a predetermined amount required to at least remove said gap.
Claim 16
Dependent Claim
24 words
A method according to claim 12, further comprising a fourth step of forming an orientation flat in said semiconductor body after said third step.
Claim 17
Dependent Claim
23 words
A method according to claim 13, further comprising a fifth step of changing the thickness of said semiconductor body after said fourth step.
Claim 18
Dependent Claim
23 words
A method according to claim 12, further comprising a fourth step of changing the thickness of said semiconductor body after said third step.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1995-02-10 | 1995-08-12 | 1996-02-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-02-10 | 1999-08-12 | 2000-02-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-02-10 | 2003-08-12 | 2004-02-11 | $7700.00 | Window Closed / Lapsed |