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US5086006A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device and method of production

Assignee: Seiko Epson Corp
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Filing: 1991-05-10
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Granted: 1992-02-04
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Expires: 2011-05-10
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Abstract

Abstract A novel semiconductor device and method of production of such a device are provided. Both the N and P channels of the novel semiconductor device are formed by contact self-alignment, thereby permitting high speed operation and high density integration to be realized. The formation of the channels by contact self-alignment is accomplished by depositing a P type polysilicon layer on an N well region and an N type polysilicon layer on a P well region. A silicide layer is formed over both the P and N type polysilicon layers to form a polycide.

Inventors

  • 👤 Michio Asahina

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 22:35
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/859; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0172; H10D84/0174; H10D84/0186; H10D84/0188; H10D84/02; H10D84/03; H10D84/038; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4451

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 387 words
A method for making a semiconductor device comprising: forming a substrate of a first conductivity type; forming a well region of a second conductivity type in the substrate; forming an insulating film over the well region and the substrate; photoetching the insulating film to expose a portion of the substrate and a portion of the well region; forming a polysilicon layer of the second conductivity type on the exposed portion of the substrate and the insulating film which is over the substrate; forming a polysilicon layer of the first conductivity type on the exposed portion of the well region and the insulating film which is over the well region, such that a junction is formed where the polysilicon layer of the first conductivity type is directly connected to the polysilicon layer of the second conductivity type; heating the polysilicon layers such that the polysilicon layer of the second conductivity type is thermally diffused into the exposed portion of the substrate thereby forming a first diffusion region, and the polysilicon layer of the first conductivity type is thermally diffused into the exposed portion of the well region thereby forming a second diffusion region, and the first and second diffusion regions are separated by that portion of the insulating film which is directly below the junction of the polysilicon layers; forming a metal silcide film by sputtering over the surface; photoetching the metal silicide film, the polysilicon layer of the second conductivity type, the polysilicon layer of the first conductivity type, and the remaining insulating layer to form a first gate over the substrate, a second gate over the well region, and a wiring which includes the junction of the polysilicon layers and the first and second diffusion regions, and thereby exposing the substrate on both sides of the first gate and exposing the well region on both sides of the second gate; and injecting a high concentration of ions of the first conductivity type into the exposed ares of the substrate to form a first source and drain region in the substrate on either side of the first gate, and injecting a high concentration of ions of the second conductivity type into the exposed ares of the well region to form a second source and drain region in the well region on either side of the second gate.
Claim 2
Independent Claim 387 words
A method for making a semiconductor device comprising: forming a substrate of a first conductivity type; forming a well region of a second conductivity type in the substrate; forming an insulating film over the well region and the substrate; photoetching the insulating film to expose a portion of the substrate and a portion of the well region; forming a polysilicon layer of the second conductivity type on the exposed portion of the substrate and the insulating film which is over the substrate; forming a polysilicon layer of the first conductivity type on the exposed portion of the well region and the insulating film which is over the well region, such that a junction is formed where the polysilicon layer of the first conductivity type is directly connected to the polysilicon layer of the second conductivity type; heating the polysilicon layers such that the polysilicon layer of the second conductivity type is thermally diffused into the exposed portion of the substrate thereby forming a first diffusion region, and the polysilicon layer of the first conductivity type is thermally diffused into the exposed portion of the well region thereby forming a second diffusion region, and the first and second diffusion regions are separated by that portion of the insulating film which is directly below the junction of the polysilicon layers; forming a metal silcide film by sputtering over the surface; photoetching the metal silicide film, the polysilicon layer of the second conductivity type, the polysilicon layer of the first conductivity type, and the remaining insulating layer to form a first gate over the substrate, a second gate over the well region, and a wiring which includes the junction of the polysilicon layers and the first and second diffusion regions, and thereby exposing the substrate on both sides of the first gate and exposing the well region on both sides of the second gate; and injecting a high concentration of ions of the first conductivity type into the exposed ares of the substrate to form a first source and drain region in the substrate on either side of the first gate, and injecting a high concentration of ions of the second conductivity type into the exposed ares of the well region to form a second source and drain region in the well region on either side of the second gate.
Claim 3
Dependent Claim 33 words
The method of claim 1, wherein the metal silicide film is selected from the group consisting of molybdenum disilicon (MoSi 2 ), tungsten disilicon (WSi 2 ) and titanium disilicon (TiSi 2 ).

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-02-03 1995-08-05 1996-02-04 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-02-03 1999-08-05 2000-02-04 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-02-03 2003-08-05 2004-02-04 $7700.00 Window Closed / Lapsed

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