Patent US5084752A successfully refreshed from Google Patents.
US5084752A
Expired / Lapsed
US
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Semiconductor device having bonding pad comprising buffer layer
Assignee: Mitsubishi Electric Corp
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Filing: 1990-06-15
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Granted: 1992-01-28
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Expires: 2010-06-15
Abstract
Abstract A semiconductor device includes a substrate (4) in a periphery of which are formed elements isolating regions. A bonding pad (3) is formed above the elements isolating region, with an isolation layer (7) provided therebetween. An underlying layer (12) having a buffering function is formed on a surface of the bonding pad and the semiconductor substrate. In one aspect of the invention, wherein the elements isolating region is formed of LOCOS film (30), the underlying layer is formed between the bonding pad and the LOCOS film. In another aspect of the invention, the elements isolating region is of a field-shield structure (13, 14), and the underlying layer (12) is formed by separating a part of a gate electrode layer (14) of the field shield into an island. The underlying layer buffers the structure against an external force that is applied on the bonding pad in a bonding processing, to thereby prevent generation of cracks in the semiconductor layer.
Inventors
- 👤 Shinichi Satoh
- 👤 Hiroji Ozaki
- 👤 Hiroshi Kimura
- 👤 Wataru Wakamiya
- 👤 Yoshinori Tanaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 19:00
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/01; H10W72/019; H10W72/071; H10W72/075; H10W72/07531; H10W72/07532; H10W72/07533; H10W72/20; H10W72/29; H10W72/50; H10W72/531; H10W72/536; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/59; H10W72/90; H10W72/931; H10W72/932; H10W72/951; H10W72/952; H10W72/981; H10W72/983; H10W90/00; H10W90/701; H10W90/751; H10W90/756
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
149 words
A semiconductor device, comprising: a semiconductor substrate having a major surface in which a plurality of semiconductor elements are formed; elements isolating means formed in the major surface of said semiconductor substrate for insulating and isolating said plurality of semiconductor elements; a bonding pad formed at a predetermined position above the major surface of said semiconductor substrate; an interlayer insulation layer provided between the bonding pad and the major surface of the semiconductor substrate; and an underlying layer of a material different from a material of said interlayer insulation layer, positioned between said bonding pad and the major surface of said semiconductor substrate in which said elements isolating means are located and covering at least a region under said bonding pad, to oppose cracking and leakage between the bonding pad and the substrate when the bonding pad is subjected to an externally imposed force during manufacture of the device.
Claim 2
Dependent Claim
149 words
A semiconductor device, comprising: a semiconductor substrate having a major surface in which a plurality of semiconductor elements are formed; elements isolating means formed in the major surface of said semiconductor substrate for insulating and isolating said plurality of semiconductor elements; a bonding pad formed at a predetermined position above the major surface of said semiconductor substrate; an interlayer insulation layer provided between the bonding pad and the major surface of the semiconductor substrate; and an underlying layer of a material different from a material of said interlayer insulation layer, positioned between said bonding pad and the major surface of said semiconductor substrate in which said elements isolating means are located and covering at least a region under said bonding pad, to oppose cracking and leakage between the bonding pad and the substrate when the bonding pad is subjected to an externally imposed force during manufacture of the device.
Claim 3
Dependent Claim
59 words
A semiconductor device according to claim 1, further comprising: an insulation film disposed on the major surface of said semiconductor substrate, and wherein said elements isolating means comprises an electrode layer formed on said insulation film and positioned between respective impurity regions of adjacent semiconductor elements which are of a conductivity type different from that of said semiconductor substrate.
Claim 4
Dependent Claim
59 words
A semiconductor device according to claim 2, wherein: said electrode layer comprises opening portions in a region located below said bonding pad, and said underlying layer is located between said opening portions, with a periphery of the underlying layer surrounded by an insulation layer, said underlying layer being maintained in an electrically floating state during use of the device.
Claim 5
Dependent Claim
31 words
A semiconductor device according to claim 3, further comprising: impurity regions having the same conductivity type as that of said semiconductor substrate, located between said electrode layer and said underlying layer.
Claim 6
Dependent Claim
35 words
A semiconductor device according to claim 4, further comprising: a plurality of interlayer underlying layers which are stacked between said bonding pad and said underlying layer, adjacent interlayer underlying layers being separated by insulation layers.
Claim 7
Dependent Claim
30 words
A semiconductor device according to claim 5, wherein: one of said plurality of interlayer underlying layers is formed to be in contact with an under surface of said bonding pad.
Claim 8
Dependent Claim
18 words
A semiconductor device according to claim 4, wherein: said bonding pad comprises a plurality of stacked metal layers.
Claim 9
Dependent Claim
47 words
A semiconductor device according to claim 3, further comprising: a plurality of interlayer underlying layers stacked between said bonding pad and said underlying layer, with respective insulation layers disposed between adjacent ones of said interlayer underlying layers as well as said bonding pad and said underlying layer.
Claim 10
Dependent Claim
23 words
A semiconductor device according to claim 2, wherein: at least one underlying layer is formed between said bonding pad and said electrode layer.
Claim 11
Dependent Claim
22 words
A semiconductor device according to claim 9, wherein: said underlying layer comprises one of a polycrystalline silicon layer and a metal layer.
Claim 12
Dependent Claim
31 words
A semiconductor device according to claim 9, wherein: one of said at least one interlayer underlying layer is formed to be in contact with an under surface of said bonding pad.
Claim 13
Dependent Claim
20 words
A semiconductor device according to claim 9, wherein: said bonding pad is formed of a plurality of stacked metal layers.
Claim 14
Dependent Claim
34 words
A semiconductor device according to claim 1, wherein: said elements isolating means comprises a field oxide film formed on the major surface of the semiconductor substrate in a region located below said bonding pad.
Claim 15
Dependent Claim
22 words
A semiconductor device according to claim 13, wherein: said underlying layer comprises one of a polycrystalline silicon layer and a metal layer.
Claim 16
Dependent Claim
26 words
A semiconductor device according to claim 14, wherein: an additional underlying layer is formed to be in contact with a lower surface of said bonding pad.
Claim 17
Dependent Claim
20 words
A semiconductor device according to claim 14, wherein: said bonding pad is formed of a plurality of stacked metal layers.
Claim 18
Dependent Claim
212 words
A semiconductor device, comprising: a semiconductor chip in which integrated circuits are formed said semiconductor chip having a bonding pad portion; a lead frame having a mounting portion for mounting said semiconductor chip and an external lead for enabling an electrical connection thereto; a metal wire for connecting said bonding pad portion of said semiconductor chip and said external lead; wherein said semiconductor chip further comprises a semiconductor substrate having a major surface in which a plurality of semiconductor elements are formed, elements isolating means for insulating and isolating between said plurality of semiconductor elements, the elements isolating means being formed in the major surface of said semiconductor substrate, a bonding pad formed at a predetermined position on the major surface of said semiconductor substrate through an interlayer insulation layer, an underlying layer formed of a material different from a material of said interlayer insulation layer, said underlying layer being positioned between said bonding pad and the major surface of said semiconductor substrate in which said elements isolating means is located, the underlying layer extending across at least a region under said bonding pad, to oppose cracking and leakage between the bonding pad and the substrate when the bonding pad is subjected to an externally imposed force during manufacture of the device.
Claim 19
Dependent Claim
212 words
A semiconductor device, comprising: a semiconductor chip in which integrated circuits are formed said semiconductor chip having a bonding pad portion; a lead frame having a mounting portion for mounting said semiconductor chip and an external lead for enabling an electrical connection thereto; a metal wire for connecting said bonding pad portion of said semiconductor chip and said external lead; wherein said semiconductor chip further comprises a semiconductor substrate having a major surface in which a plurality of semiconductor elements are formed, elements isolating means for insulating and isolating between said plurality of semiconductor elements, the elements isolating means being formed in the major surface of said semiconductor substrate, a bonding pad formed at a predetermined position on the major surface of said semiconductor substrate through an interlayer insulation layer, an underlying layer formed of a material different from a material of said interlayer insulation layer, said underlying layer being positioned between said bonding pad and the major surface of said semiconductor substrate in which said elements isolating means is located, the underlying layer extending across at least a region under said bonding pad, to oppose cracking and leakage between the bonding pad and the substrate when the bonding pad is subjected to an externally imposed force during manufacture of the device.
Claim 20
Dependent Claim
189 words
A flip-chip type semiconductor device in which a bonding pad portion is disposed at a predetermined position on a major surface of a semiconductor substrate and is soldered directly into a circuit pattern on a circuit substrate and packed the semiconductor device comprising: a semiconductor substrate having a major surface in which a plurality of semiconductor elements are formed; a bonding pad being formed in a predetermined position on the major surface of said semiconductor substrate through an interlayer insulation layer; elements isolating means formed in the major surface of said semiconductor substrate and located for insulating and isolating said plurality of semiconductor elements from each other and from said bonding pad an underlying layer of a material different from a material of said interlayer insulation layer, positioned between said bonding pad and the major surface of said semiconductor substrate in which said element isolating means is located, the underlying layer extending across at least a region under said bonding pad, to oppose cracking and leakage between the bonding pad and the substrate when the bonding pad is subjected to an externally imposed force during manufacture of the device.
Claim 21
Dependent Claim
189 words
A flip-chip type semiconductor device in which a bonding pad portion is disposed at a predetermined position on a major surface of a semiconductor substrate and is soldered directly into a circuit pattern on a circuit substrate and packed the semiconductor device comprising: a semiconductor substrate having a major surface in which a plurality of semiconductor elements are formed; a bonding pad being formed in a predetermined position on the major surface of said semiconductor substrate through an interlayer insulation layer; elements isolating means formed in the major surface of said semiconductor substrate and located for insulating and isolating said plurality of semiconductor elements from each other and from said bonding pad an underlying layer of a material different from a material of said interlayer insulation layer, positioned between said bonding pad and the major surface of said semiconductor substrate in which said element isolating means is located, the underlying layer extending across at least a region under said bonding pad, to oppose cracking and leakage between the bonding pad and the substrate when the bonding pad is subjected to an externally imposed force during manufacture of the device.
Claim 22
Dependent Claim
181 words
A tape arrier type semiconductor device in which a bonding pad portion disposed at a predetermined position of a major surface of a semiconductor substrate is soldered and attached to a lead portion patterned into a resin tape with the lead portion thereafter cut into a predetermined ocnfiguration, soldered on a circuit substrate, and then packed, said semiconductor device comprising: a semiconductor substrate having a major surface on which a plurality of semiconductor elements are formed; element isolating means formed on the major surface of said semiconductor substrate and for insulating and isolating said plurality of semiconductor elements; a bonding pad formed in a predetermined position on the major surface of said semiconductor substrate, with an interlayer insulation layer provided between said bonding pad and said major surface of said semiconductor substrate; an underlying layer of a material different from a material of said interlayer insulation layer, positioned between said bonding pad and the major surface of said semiconductor substrate in which said element isolating means is located, the underlying layer extending across at least a region under said bonding pad.
Claim 23
Dependent Claim
181 words
A tape arrier type semiconductor device in which a bonding pad portion disposed at a predetermined position of a major surface of a semiconductor substrate is soldered and attached to a lead portion patterned into a resin tape with the lead portion thereafter cut into a predetermined ocnfiguration, soldered on a circuit substrate, and then packed, said semiconductor device comprising: a semiconductor substrate having a major surface on which a plurality of semiconductor elements are formed; element isolating means formed on the major surface of said semiconductor substrate and for insulating and isolating said plurality of semiconductor elements; a bonding pad formed in a predetermined position on the major surface of said semiconductor substrate, with an interlayer insulation layer provided between said bonding pad and said major surface of said semiconductor substrate; an underlying layer of a material different from a material of said interlayer insulation layer, positioned between said bonding pad and the major surface of said semiconductor substrate in which said element isolating means is located, the underlying layer extending across at least a region under said bonding pad.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-01-27 | 1995-07-29 | 1996-01-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-01-27 | 1999-07-29 | 2000-01-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-01-27 | 2003-07-29 | 2004-01-28 | $7700.00 | Window Closed / Lapsed |