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US5083043A Expired / Lapsed US ⏱️ 0.0 years remaining

Voltage control circuit for a semiconductor apparatus capable of controlling an output voltage

Assignee: Sharp Corp
•
Filing: 1991-01-18
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Granted: 1992-01-21
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Expires: 2011-01-18
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Abstract

Abstract There is disclosed a voltage control circuit for a semiconductor apparatus for controlling an output voltage to be applied from an external voltage source to a load circuit of the semiconductor apparatus therethrough. A reference voltage generator generates a predetermined reference voltage according to a source voltage outputted from an external voltage source, and an error amplifier compares the output voltage with the reference voltage, and outputs a comparison signal for representing the comparison result thereof. A voltage controller controls the output voltage according to the comparison signal. Further, a diode circuit which is connected in parallel with the voltage controller applies the source voltage to the load circuit in a forward direction thereof. Furthermore, a first switching device enables the reference voltage generator, the error amplifier and the voltage controlled in response to a first control signal outputted from an external circuit, and for disabling the reference voltage generator, the error amplifier and the voltage controller in response to a second control signal outputted from the external circuit. Also, a second switching device enables the diode circuit in response to the second control signal, and for disabling the diode circuit in response to the first control signal.

Inventors

  • 👤 Makoto Yoshida

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 13:39
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/462; G05F1/465; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24; G11; G11C; G11C5/00; G11C5/14; G11C5/147; H; H03; H03K; H03K17/00; H03K17/04; H03K17/041; H03K17/04106; H03K17/12; H03K17/51; H03K17/56; H03K17/687; H03K17/6871

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 267 words
A voltage control circuit for a semiconductor apparatus for controlling an output voltage to be applied from an external voltage source to a load circuit of said semiconductor apparatus therethrough, comprising: reference voltage generating means for generating a predetermined reference voltage according to a source voltage outputted from an external voltage source; comparing means for comparing said output voltage to be applied to said load circuit with said reference voltage generated by said reference voltage generating means, and outputting a comparison signal for representing said comparison result thereof; voltage control means for controlling said output voltage to be applied to said load circuit according to said comparison signal outputted from said comparing means; diode means for applying said source voltage outputted from said external voltage source to said load circuit in a forward direction thereof, said diode means being connected in parallel with said voltage control means; first switching means for enabling said reference voltage generating means, said comparing means and said voltage control means in response to a first control signal outputted from an external circuit when said load circuit requires a relatively large current equal to or larger than a predetermined threshold current, and for disabling said reference voltage generating means, said comparing means and said voltage control means in response to a second control signal outputted from said external circuit when said load circuit requires a relatively small current smaller than said predetermined threshold current; and second switching means for enabling said diode means in response to said second control signal, and for disabling said diode means in response to said first control signal.
Claim 2
Dependent Claim 267 words
A voltage control circuit for a semiconductor apparatus for controlling an output voltage to be applied from an external voltage source to a load circuit of said semiconductor apparatus therethrough, comprising: reference voltage generating means for generating a predetermined reference voltage according to a source voltage outputted from an external voltage source; comparing means for comparing said output voltage to be applied to said load circuit with said reference voltage generated by said reference voltage generating means, and outputting a comparison signal for representing said comparison result thereof; voltage control means for controlling said output voltage to be applied to said load circuit according to said comparison signal outputted from said comparing means; diode means for applying said source voltage outputted from said external voltage source to said load circuit in a forward direction thereof, said diode means being connected in parallel with said voltage control means; first switching means for enabling said reference voltage generating means, said comparing means and said voltage control means in response to a first control signal outputted from an external circuit when said load circuit requires a relatively large current equal to or larger than a predetermined threshold current, and for disabling said reference voltage generating means, said comparing means and said voltage control means in response to a second control signal outputted from said external circuit when said load circuit requires a relatively small current smaller than said predetermined threshold current; and second switching means for enabling said diode means in response to said second control signal, and for disabling said diode means in response to said first control signal.
Claim 3
Dependent Claim 63 words
The circuit as claimed in claim 1, wherein said semiconductor apparatus is an integrated circuit to which a chip enable signal is inputted from said external circuit, said first control signal corresponds to said chip enable signal having a first level, and said second control signal corresponds to said chip enable signal having a second level which is different from said first level.
Claim 4
Dependent Claim 67 words
The circuit as claimed in claim 1, wherein said first switching means comprises: a first transistor for controlling the action of said reference signal generating means; a second transistor for controlling the action of said comparing means; and a third transistor for controlling the action of said voltage control means, and said second switching means comprises a fourth transistor for controlling the action of said diode means.
Claim 5
Dependent Claim 61 words
The circuit as claimed in claim 3, wherein said first transistor is an N type metal oxide semiconductor field effect transistor; said second transistor is an N type metal oxide semiconductor field effect transistor; said third transistor is a P type metal oxide semiconductor field effect transistor; and said fourth transistor is a P type metal oxide semiconductor field effect transistor.
Claim 6
Dependent Claim 67 words
The circuit as claimed in claim 2, wherein said first switching means comprises: a first transistor for controlling the action of said reference signal generating means; a second transistor for controlling the action of said comparing means; and a third transistor for controlling the action of said voltage control means, and said second switching means comprises a fourth transistor for controlling the action of said diode means.
Claim 7
Dependent Claim 61 words
The circuit as claimed in claim 5, wherein said first transistor is an N type metal oxide semiconductor field effect transistor; said second transistor is an N type metal oxide semiconductor field effect transistor; said third transistor is a P type metal oxide semiconductor field effect transistor; and said fourth transistor is a P type metal oxide semiconductor field effect transistor.
Claim 8
Dependent Claim 25 words
The circuit as claimed in claim 1, wherein said comparing means is an error amplifier, and said voltage control means is a field effect transistor.
Claim 9
Dependent Claim 25 words
The circuit as claimed in claim 2, wherein said comparing means is an error amplifier, and said voltage control means is a field effect transistor.

References Cited (Backward Citations)

US4017779A Cited
US4652808A Cited
US4779037A Cited
US4906913A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-01-20 1995-07-22 1996-01-21 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-01-20 1999-07-22 2000-01-21 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-01-20 2003-07-22 2004-01-21 $7700.00 Window Closed / Lapsed

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