← Back to Patent Explorer
US5081653A Expired / Lapsed US ⏱️ 0.0 years remaining

Automatic gain control circuit for multilevel duobinary AM/PSK modulated signals

Assignee: NEC Corp
•
Filing: 1988-08-17
•
Granted: 1992-01-14
•
Expires: 2008-08-17
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An automatic gain control circuit for multilevel duobinary AM/PSK (amplitude modulation/phase shift keying) signals allows multilevel modulated signals to be received accurately. The circuit includes an amplifier that is controlled such that during a preamble section the amplifier has a gain associated with the level of the inputted signal. During a data section the amplifier is controlled to maintain a substantially constant gain. The invention may be used in the reception of AM/PSK modulated signals.

Inventors

  • 👤 Toshio Saito

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 03:29
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/32; H04L27/34; H04L27/38; H04L27/3809; H03; H03G; H03G3/00; H03G3/20; H03G3/30

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 167 words
An automatic gain control circuit comprising: amplifier means for amplifying a multilevel modulated signal in the form of a burst, having a preamble pattern, in response to a gain control signal which is fed to said amplifier means from an integrator; filter means for low-pass filtering an output signal of said amplifier means to produce a filtered signal; clock regenerator means for regenerating a clock component out of a multilevel modulated signal to produce a clock signal; means for producing from said multilevel modulated signal a preamble indication signal indicative of a section over which said preamble continues; sampling clock generator means for producing sampling clock pulses in response to said preamble indication signal and said clock signal; and sample and hold means for sampling said filtered signal in response to said sampling clock pulses to produce a sampled signal; and wherein said integrator integrates said sampled signal of said sample and hold means in response to said preamble indication signal to produce said gain control signal.
Claim 2
Dependent Claim 167 words
An automatic gain control circuit comprising: amplifier means for amplifying a multilevel modulated signal in the form of a burst, having a preamble pattern, in response to a gain control signal which is fed to said amplifier means from an integrator; filter means for low-pass filtering an output signal of said amplifier means to produce a filtered signal; clock regenerator means for regenerating a clock component out of a multilevel modulated signal to produce a clock signal; means for producing from said multilevel modulated signal a preamble indication signal indicative of a section over which said preamble continues; sampling clock generator means for producing sampling clock pulses in response to said preamble indication signal and said clock signal; and sample and hold means for sampling said filtered signal in response to said sampling clock pulses to produce a sampled signal; and wherein said integrator integrates said sampled signal of said sample and hold means in response to said preamble indication signal to produce said gain control signal.
Claim 3
Dependent Claim 76 words
An automatic gain control circuit as claimed in claim 1, wherein said integrator comprises: an operational amplifier; an integrating capacitor connected to an output and to a first input of said operational amplifier; a first and a second resistor connected to said first input of said operational amplifier; and a switch for selectively connecting said first resistor or said second resistor to said first input of said operational amplifier in response to said preamble indication signal.
Claim 4
Independent Claim 117 words
A method of amplifying a multilevel signal comprising the steps of: inputting an inputted multilevel signal; filtering the inputted multilevel signal with a low pass filter to produce a second signal; regenerating a clock component of the inputted multilevel signal and outputting a regenerated signal as a third signal; determining a preamble portion of the inputted multilevel signal and outputting a fourth signal corresponding to the preamble portion; generating a fifth signal indicating when regenerated clock pulses occur during the preamble portion using the third and fourth signals; sampling the second signal in response to the fifth signal to generate sixth signal; integrating the sixth signal; and controlling the gain of an amplifier using the sixth signal.
Claim 5
Independent Claim 117 words
A method of amplifying a multilevel signal comprising the steps of: inputting an inputted multilevel signal; filtering the inputted multilevel signal with a low pass filter to produce a second signal; regenerating a clock component of the inputted multilevel signal and outputting a regenerated signal as a third signal; determining a preamble portion of the inputted multilevel signal and outputting a fourth signal corresponding to the preamble portion; generating a fifth signal indicating when regenerated clock pulses occur during the preamble portion using the third and fourth signals; sampling the second signal in response to the fifth signal to generate sixth signal; integrating the sixth signal; and controlling the gain of an amplifier using the sixth signal.
Claim 6
Dependent Claim 54 words
A method of amplifying a multilevel signal as set forth in claim 3, wherein: during the preamble portion, the gain of the amplifier is controlled such that the amplifier has a gain associated with a level of the inputted multilevel signal; and following the preamble portion the gain of the amplifier is essentially constant.
Claim 7
Dependent Claim 76 words
An amplifying circuit for amplifying an inputted multilevel signal, the inputted multilevel signal including a preamble portion and a non-preamble portion, the amplifying circuit comprising: an amplifier; and an integrator whose output controls the gain of the amplifier; and wherein: the integrator controls the gain of the amplifier on the basis of samples of an amplifier output; and the integrator uses one time constant during the preamble portion and another time constant during the non-preamble portion.
Claim 8
Dependent Claim 76 words
An amplifying circuit for amplifying an inputted multilevel signal, the inputted multilevel signal including a preamble portion and a non-preamble portion, the amplifying circuit comprising: an amplifier; and an integrator whose output controls the gain of the amplifier; and wherein: the integrator controls the gain of the amplifier on the basis of samples of an amplifier output; and the integrator uses one time constant during the preamble portion and another time constant during the non-preamble portion.

References Cited (Backward Citations)

US3409834A Cited
US3620631A Cited
US3936599A Cited
US4453258A Cited
US4458355A Cited
US4464723A Cited
US4539692A Cited
US4574246A Cited
US4597089A Cited
US4807248A Cited
US4707730A Cited
US4691377A Cited
US4757502A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-01-13 1995-07-15 1996-01-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-01-13 1999-07-15 2000-01-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-01-13 2003-07-15 2004-01-14 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag