Patent US5081519A successfully refreshed from Google Patents.
US5081519A
Expired / Lapsed
US
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Semiconductor device
Assignee: Mitsubishi Electric Corp
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Filing: 1990-09-13
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Granted: 1992-01-14
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Expires: 2010-09-13
Abstract
Abstract A semiconductor device includes a single crystal III-V compound semiconductor layer disposed on a silicon on sapphire substrate comprising a silicon layer disposed on a sapphire substrate, the silicon on sapphire substrate including a silicon (001) oriented crystalline film grown on the (1102) R face of the sapphire substrate tilted 0.1 to 10 degrees toward the <110> direction or <110> direction of the silicon film away from the <0001> sapphire C axis.
Inventors
- 👤 Takashi Nishimura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 21:53
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/29; H10P14/2901; H10P14/2921; H10P14/32; H10P14/3202; H10P14/3204; H10P14/3211; H10P14/3258; H10P14/34; H10P14/3402; H10P14/3414; H10P14/3421; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/1914; Y; Y10; Y10S; Y10S438/00; Y10S438/933
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
101 words
A semiconductor device comprising: a single crystal III-V compound semiconductor layer having a mirror-like surface disposed on a silicon on sapphire substrate, said substrate comprising a silicon layer disposed on a sapphire substrate, said silicon on sapphire substrate comprising a silicon (001) oriented crystalline film grown on the (1102) R face of the sapphire substrate tilted 0.1 to 10 degrees toward the <110> direction or <110> direction of the silicon film away from the <0001> sapphire C axis whereby crystalline orientational error tolerance in the sapphire substrate without loss of the mirror-like surface of the III-V compound semiconductor layer is maximized.
Claim 2
Dependent Claim
101 words
A semiconductor device comprising: a single crystal III-V compound semiconductor layer having a mirror-like surface disposed on a silicon on sapphire substrate, said substrate comprising a silicon layer disposed on a sapphire substrate, said silicon on sapphire substrate comprising a silicon (001) oriented crystalline film grown on the (1102) R face of the sapphire substrate tilted 0.1 to 10 degrees toward the <110> direction or <110> direction of the silicon film away from the <0001> sapphire C axis whereby crystalline orientational error tolerance in the sapphire substrate without loss of the mirror-like surface of the III-V compound semiconductor layer is maximized.
Claim 3
Dependent Claim
131 words
A semiconductor device comprising: a single crystal III-V compound semiconductor layer having a mirror-like surface and disposed on a silicon on sapphire substrate, said substrate comprising a silicon layer disposed on a sapphire substrate, said silicon on sapphire substrate comprising a silicon (001) oriented crystalline film grown on the (1102) R face of the sapphire substrate tilted 0.1 to 10 degrees toward the <110> direction or <110> direction of the silicon film away from the <0001> sapphire C axis and rotated by an angle greater than 0 degrees and less than 45 degrees from the (110) direction or <110> direction along the [001] axis of the silicon film whereby crystalline orientational error tolerance in the sapphire substrate without loss of the mirror-like surface of the III-V compound semiconductor layer is maximized.
Claim 4
Dependent Claim
131 words
A semiconductor device comprising: a single crystal III-V compound semiconductor layer having a mirror-like surface and disposed on a silicon on sapphire substrate, said substrate comprising a silicon layer disposed on a sapphire substrate, said silicon on sapphire substrate comprising a silicon (001) oriented crystalline film grown on the (1102) R face of the sapphire substrate tilted 0.1 to 10 degrees toward the <110> direction or <110> direction of the silicon film away from the <0001> sapphire C axis and rotated by an angle greater than 0 degrees and less than 45 degrees from the (110) direction or <110> direction along the [001] axis of the silicon film whereby crystalline orientational error tolerance in the sapphire substrate without loss of the mirror-like surface of the III-V compound semiconductor layer is maximized.
Claim 5
Dependent Claim
14 words
The semiconductor device of claim 1 wherein the III-V compound semiconductor layer is GaAs.
Claim 6
Dependent Claim
14 words
The semiconductor device of claim 3 wherein the III-V compound semiconductor layer is GaAs.
References Cited (Backward Citations)
JPH01173709A
Cited
JPH01173708A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-01-13 | 1995-07-15 | 1996-01-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-01-13 | 1999-07-15 | 2000-01-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-01-13 | 2003-07-15 | 2004-01-14 | $7700.00 | Window Closed / Lapsed |