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US5079734A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital decimation filter

Assignee: Intersil Corp
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Filing: 1990-04-30
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Granted: 1992-01-07
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Expires: 2010-04-30
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Abstract

Abstract A narrow band digital decimation filter that can be implemented on a single integrated circuit has a high order decimation filter that receives input digital data at P sampling rate and produces output digital data at Q sampling rate, where P>Q. The high order decimation filter can be a Hogenauer filter. A finite impulse response (FIR) filter, containing only a single multiplier and only a single accumulator, receives the output from the high order decimation filter at the now lowered sampling rate, and cleans up the frequency response of the high order decimation filter to provide narrow band filtering.

Inventors

  • 👤 Callie A. Riley

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 12:54
CPC Classifications
H; H03; H03H; H03H17/00; H03H17/02; H03H17/06; H03H17/0621; H03H17/0635; H03H17/0671

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 122 words
A digital decimation filter comprising: a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q; and a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter.
Claim 2
Dependent Claim 122 words
A digital decimation filter comprising: a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q; and a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter.
Claim 3
Dependent Claim 24 words
The digital decimation filter of claim 1, wherein the high order decimation filter and the FIR filter are provided on a single integrated circuit.
Claim 4
Dependent Claim 48 words
The digital decimation filter of claim 2, wherein the FIR filter contains only a single multiplier and a single accumulator, an input of the multiplier being coupled to the input of the FIR filter and an input of the accumulator being coupled to an output of the multiplier.
Claim 5
Dependent Claim 17 words
The digital decimation filter of claim 3, wherein the high order decimation filter is a Hogenauer filter.
Claim 6
Dependent Claim 43 words
The digital decimation filter of claim 4, wherein the Hogenauer filter includes a cascaded integrator filter stage section having an input and an output and a comb filter stage section having an input coupled to the output of the integrator filter stage section.
Claim 7
Dependent Claim 30 words
The digital decimation filter of claim 5, wherein the Hogenauer filter further includes a decimation register coupled between the cascaded integrator filter stage section and the comb filter stage section.
Claim 8
Dependent Claim 26 words
The digital decimation filter of claim 6, wherein the cascaded integrator filter stage section of the Hogenauer filter includes a plurality of identical integrator filter stages.
Claim 9
Dependent Claim 318 words
A digital decimation filter comprising: a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q; a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter; wherein the high order decimation filter and the FIR filter are provided on a single integrated circuit; wherein the FIR filter contains only a single multiplier and a single accumulator, an input of the multiplier being coupled to the input of the FIR filter and an input of the accumulator being coupled to an output of the multiplier; wherein the high order decimation filter is a Hogenauer filter; wherein the Hogenauer filter includes a cascaded integrator filter stage section and a comb filter stage section coupled to the integrator filter stage section; wherein the Hogenauer filter further includes a decimation register coupled between the cascaded integrator filter stage section and the comb filter stage section; wherein the cascaded integrator filter stage section of the Hogenauer filter includes a plurality of identical integrator filter stages; and wherein the comb filter stage section includes a plurality of comb filter stages and at least one of the comb filter stages includes a rounder, an output of the rounder being the output of said high order decimation filter, said rounder rounding the decimated output digital data before the decimated output digital data is provided as an input to the FIR filter.
Claim 10
Dependent Claim 318 words
A digital decimation filter comprising: a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q; a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter; wherein the high order decimation filter and the FIR filter are provided on a single integrated circuit; wherein the FIR filter contains only a single multiplier and a single accumulator, an input of the multiplier being coupled to the input of the FIR filter and an input of the accumulator being coupled to an output of the multiplier; wherein the high order decimation filter is a Hogenauer filter; wherein the Hogenauer filter includes a cascaded integrator filter stage section and a comb filter stage section coupled to the integrator filter stage section; wherein the Hogenauer filter further includes a decimation register coupled between the cascaded integrator filter stage section and the comb filter stage section; wherein the cascaded integrator filter stage section of the Hogenauer filter includes a plurality of identical integrator filter stages; and wherein the comb filter stage section includes a plurality of comb filter stages and at least one of the comb filter stages includes a rounder, an output of the rounder being the output of said high order decimation filter, said rounder rounding the decimated output digital data before the decimated output digital data is provided as an input to the FIR filter.
Claim 11
Dependent Claim 298 words
A digital decimation filter comprising: a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q; a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter; wherein the high order decimation filter and the fir filter are provided on a single integrated circuit; wherein the FIR filter contains only a single multiplier and a single accumulator, an input of the multiplier being coupled to the input of the FIR filter and an input of the accumulator being coupled to an output of the multiplier; wherein the high order decimation filter is a Hogenauer filter; wherein the Hogenauer filter includes a cascaded integrator filter stage section and a comb filter stage section coupled to the integrator filter stage section; wherein the Hogenauer filter further includes a decimation register coupled between the cascaded integrator filter stage section and the comb filter stage section; wherein the cascaded integrator filter stage section of the Hogenauer filter includes a plurality of identical integrator filter stages; and wherein the comb filter stage section includes a plurality of comb filter stages, and further comprising means coupled to the Hogenauer filter for programmably bypassing at least one of the integrator filter stages and at least one of the comb filter stages.
Claim 12
Dependent Claim 298 words
A digital decimation filter comprising: a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q; a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter; wherein the high order decimation filter and the fir filter are provided on a single integrated circuit; wherein the FIR filter contains only a single multiplier and a single accumulator, an input of the multiplier being coupled to the input of the FIR filter and an input of the accumulator being coupled to an output of the multiplier; wherein the high order decimation filter is a Hogenauer filter; wherein the Hogenauer filter includes a cascaded integrator filter stage section and a comb filter stage section coupled to the integrator filter stage section; wherein the Hogenauer filter further includes a decimation register coupled between the cascaded integrator filter stage section and the comb filter stage section; wherein the cascaded integrator filter stage section of the Hogenauer filter includes a plurality of identical integrator filter stages; and wherein the comb filter stage section includes a plurality of comb filter stages, and further comprising means coupled to the Hogenauer filter for programmably bypassing at least one of the integrator filter stages and at least one of the comb filter stages.
Claim 13
Dependent Claim 174 words
A digital decimation filter comprising: a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q; a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter; and further comprising a data shifter having an input for receiving input digital data and an output coupled to the input of the high order decimation filter, said data shifter shifting input digital data to provide growth bits for the input digital data and producing the shifted input digital data at its output.
Claim 14
Dependent Claim 174 words
A digital decimation filter comprising: a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q; a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter; and further comprising a data shifter having an input for receiving input digital data and an output coupled to the input of the high order decimation filter, said data shifter shifting input digital data to provide growth bits for the input digital data and producing the shifted input digital data at its output.
Claim 15
Dependent Claim 29 words
The digital decimation filter of claim 10, further comprising means coupled to the data shifter for controllably varying the number of growth bits provided for the input digital data.
Claim 16
Dependent Claim 148 words
A digital decimation filter comprising: a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q; a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter; and further comprising means coupled to the high order decimation filter and the FIR filter for programmably bypassing the high order decimation filter or the FIR filter.
Claim 17
Dependent Claim 148 words
A digital decimation filter comprising: a high order decimation filter having an input and an output, the high order decimation filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R where R is greater than 100, and producing decimated output digital data at Q sampling rate at its output, where P>Q; a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the high order decimation filter, the FIR filter performing further decimation and final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter; and further comprising means coupled to the high order decimation filter and the FIR filter for programmably bypassing the high order decimation filter or the FIR filter.
Claim 18
Dependent Claim 137 words
A narrow band digital filter comprising: a Hogenauer filter having an input and an output, the Hogenauer filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R, where R is greater than 100 and producing decimated output digital data at Q sampling rate at its output, where P>Q; a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the Hogenauer filter, the FIR filter performing final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter; wherein the FIR filter contains only one multiplier and only on accumulator, and the narrow band filter is provided on a single integrated circuit.
Claim 19
Dependent Claim 137 words
A narrow band digital filter comprising: a Hogenauer filter having an input and an output, the Hogenauer filter receiving input digital data at P sampling rate at its input, decimating the input digital data by a decimation factor R, where R is greater than 100 and producing decimated output digital data at Q sampling rate at its output, where P>Q; a finite impulse response (FIR) filter having an input and an output, with the input of the FIR filter coupled to the output of the Hogenauer filter, the FIR filter performing final shaping of the decimated output digital data to produce narrow band filtered digital data at the output of the FIR filter; wherein the FIR filter contains only one multiplier and only on accumulator, and the narrow band filter is provided on a single integrated circuit.
Claim 20
Dependent Claim 16 words
The narrow band digital filter of claim 13, wherein the FIR filter includes means for decimating.

References Cited (Backward Citations)

US4961160A Cited
US4872129A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-01-06 1995-07-08 1996-01-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-01-06 1999-07-08 2000-01-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-01-06 2003-07-08 2004-01-07 $7700.00 Window Closed / Lapsed

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