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Method of manufacturing a semiconductor integrated circuit device having SOI structure

Assignee: Ricoh Co Ltd
•
Filing: 1990-01-16
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Granted: 1991-12-31
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Expires: 2010-01-16
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Abstract

Abstract A method of manufacturing a semiconductor integrated circuit device having a SOI structure includes the following steps. The first step is to form a semiconductor layer on a dielectric substrate. The second step is to form an oxide layer on the formed semiconductor layer. The third step is to form a nitride layer on the formed oxide layer. The fourth step is to remove a part of a plurality of layers composed of the semiconductor layer, the oxide layer, and a nitride layer so as to form a separated region in the layers. The fifth step is to coat a cooling agent on a surface of the nitride layer. The sixth step is to irradiate an energy beam from an outer surface of the cooling agent so as to monocrystallize the semiconductor layer. The seventh step is to remove the cooling agent from the surface of the nitride layer. And the final step is to oxidize a portion of the semiconductor layer located in the separated region by using the nitride layer. A semiconductor integrated circuit device having a SOI structure includes a semiconductor layer formed on a dielectric substrate, an oxide film formed on the semiconductor layer, a nitride layer formed on the oxide film, and a monocrystallized and oxidized semiconductor layer formed in hole portions formed in the semiconductor layer passing through the oxide layer and the nitride layer.

Inventors

  • 👤 Daisuke Kosaka

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 06:41
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/38; H10P14/3802; H10P14/3808; H10P14/3814; H10P14/29; H10P14/2901; H10P14/2902; H10P14/2905; H10P14/32; H10P14/3202; H10P14/3238; H10P14/3241; H10P14/3242; H10P14/3244; H10P14/3251; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3451; H10P14/3452; H10P14/3458; H10P14/3818; H10P14/382; H10P34/00; H10P34/40; H10P34/42; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10P90/1912; H10W; H10W10/00; H10W10/10; H10W10/181; Y; Y10; Y10S; Y10S148/00; Y10S148/152

Claims Analysis

Total Claims: 17
Claim 1
Independent Claim 143 words
A method of manufacturing a semiconductor integrated circuit device having a SOI structure, comprising the steps of: forming a non-monocrystalline semiconductor layer on a dielectric member; forming an oxide layer on said formed semiconductor layer; forming a nitride layer on said formed oxide layer; removing a part of a plurality of layers composed of said semiconductor layer, said oxide layer and said nitride layer so as to form a separated region in said layers; coating a surface active agent as cooling medium on a surface of said nitride layer; irradiating energy beam from an outer side of said coated surface active agent with an energy beam so as to mono-crystallize said semiconductor layer; removing said coated surface active agent from said surface of said nitride layer; and oxidizing a portion of said semiconductor layer located in said separated region using said nitride layer.
Claim 2
Independent Claim 143 words
A method of manufacturing a semiconductor integrated circuit device having a SOI structure, comprising the steps of: forming a non-monocrystalline semiconductor layer on a dielectric member; forming an oxide layer on said formed semiconductor layer; forming a nitride layer on said formed oxide layer; removing a part of a plurality of layers composed of said semiconductor layer, said oxide layer and said nitride layer so as to form a separated region in said layers; coating a surface active agent as cooling medium on a surface of said nitride layer; irradiating energy beam from an outer side of said coated surface active agent with an energy beam so as to mono-crystallize said semiconductor layer; removing said coated surface active agent from said surface of said nitride layer; and oxidizing a portion of said semiconductor layer located in said separated region using said nitride layer.
Claim 3
Dependent Claim 25 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said non-monocrystalline semiconductor is made of polycrystalline semiconductor.
Claim 4
Dependent Claim 26 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said non-monocrystalline semiconductor is made of an amorphous semiconductor.
Claim 5
Dependent Claim 30 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said separated region is formed by a photoengraving process and an etching process.
Claim 6
Dependent Claim 32 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said surface active agent coated on said surface of said nitride layer is polyethylene glycol.
Claim 7
Dependent Claim 28 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said non-monocrystalline semiconductor film has a thickness of about 3000 Å.
Claim 8
Dependent Claim 27 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said oxide film has a thickness of about 1000 Å.
Claim 9
Dependent Claim 27 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said nitride film has a thickness of about 1000 Å.
Claim 10
Dependent Claim 32 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said separating area has a thickness ranging from about 1000 Å to about 1500 Å.
Claim 11
Dependent Claim 24 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said surface active agent is polyethylene ether.
Claim 12
Dependent Claim 24 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said surface active agent is polyethylene ester.
Claim 13
Dependent Claim 24 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said surface active agent is polypropylene oxide.
Claim 14
Dependent Claim 24 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said energy beam is a laser beam.
Claim 15
Dependent Claim 29 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said energy beam is an optical beam other than a laser beam.
Claim 16
Dependent Claim 24 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said energy beam is an electron beam.
Claim 17
Dependent Claim 23 words
The method of manufacturing a semiconductor integrated circuit having a SOI structure according to claim 1, wherein said energy beam is heat rays.

References Cited (Backward Citations)

US3970486A Cited
JPS58147041A Cited
JPS58175842A Cited
JPS58201326A Cited
US4719183A Cited
US4822752A Cited
JPH01227423A Cited
JPH01261291A Cited
JPH0227423A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-12-30 1995-07-01 1995-12-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-12-30 1999-07-01 1999-12-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-12-30 2003-07-01 2003-12-31 $7700.00 Window Closed / Lapsed

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