US5070379A
Expired / Lapsed
US
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Thin-film transistor matrix for active matrix display panel with alloy electrodes
Assignee: Oki Electric Industry Co Ltd
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Filing: 1990-06-19
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Granted: 1991-12-03
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Expires: 2010-06-19
Abstract
Abstract A TFT matrix for an active matrix display panel has a plurality of TFTs arranged in rows and columns to form a matrix array. Each of the TFT has a control electrode on a dielectric substrate, a first insulator film formed on the control electrode, a second insulator film formed on the first insulator film, a-Si semiconductor layer formed on the second insulator film, and first and second (drain and source) electrodes formed on the a-Si semiconductor layer. The matrix has a plurality of transparent electrodes that contact the second electrodes, row interconnection layers interconnecting the control electrodes of the TFTs of the respective rows, and column interconnection layers interconnecting the first electrodes of the TFTs of the respective columns. The control electrodes and the row interconnection layers (gate electrodes) are made of an alloy of tantalum with tungsten, nickel, cobalt, rhodium, or iridium. The first insulator is formed by anodizing the surface of the gate electrode. The gate electrode has low resistance, improving the quality of the display without impairing insulation performance.
Inventors
- 👤 Tsutomu Nomoto
- 👤 Masumi Koizumi
- 👤 Akihiko Nishiki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 14:04
CPC Classifications
G; G02; G02F; G02F1/00; G02F1/01; G02F1/13; G02F1/133; G02F1/136; G02F1/1362; H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6729; H10D30/673; H10D30/6732; H10D30/6737; H10D30/6739; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6746
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
199 words
A thin film transistor matrix, comprising: a plurality of thin-film transistors formed on a transparent dielectric substrate and arranged in rows and columns to form a matrix array, each of said transistors comprising: (a) a control electrode formed as a film on said transparent dielectric substrate; (b) a first insulator film formed on said control electrode; (c) a second insulator film formed on said first insulator film; (d) an amorphous silicon semiconductor layer formed on said second insulator film; (e) a first electrode formed on said amorphous silicon semiconductor layer; and (f) a second electrode formed on said amorphous silicon semiconductor layer; said matrix array further comprising: (a) a plurality of transparent electrodes formed on said transparent dielectric substrate, contacting said respective second electrodes; (b) row interconnection layers interconnecting said control electrodes of said transistors of said respective rows; and (c) column interconnection layers interconnecting said first electrodes of said transistors of said respective columns; wherein said control electrodes and said row interconnection layers are formed of an alloy of nickel and tantalum; and, wherein said first insulator film of each of said transistors is composed of an anodized surface of said control electrode and said row interconnection layers.
Claim 2
Dependent Claim
199 words
A thin film transistor matrix, comprising: a plurality of thin-film transistors formed on a transparent dielectric substrate and arranged in rows and columns to form a matrix array, each of said transistors comprising: (a) a control electrode formed as a film on said transparent dielectric substrate; (b) a first insulator film formed on said control electrode; (c) a second insulator film formed on said first insulator film; (d) an amorphous silicon semiconductor layer formed on said second insulator film; (e) a first electrode formed on said amorphous silicon semiconductor layer; and (f) a second electrode formed on said amorphous silicon semiconductor layer; said matrix array further comprising: (a) a plurality of transparent electrodes formed on said transparent dielectric substrate, contacting said respective second electrodes; (b) row interconnection layers interconnecting said control electrodes of said transistors of said respective rows; and (c) column interconnection layers interconnecting said first electrodes of said transistors of said respective columns; wherein said control electrodes and said row interconnection layers are formed of an alloy of nickel and tantalum; and, wherein said first insulator film of each of said transistors is composed of an anodized surface of said control electrode and said row interconnection layers.
Claim 3
Dependent Claim
199 words
A thin film transistor matrix, comprising: a plurality of thin-film transistors formed on a transparent dielectric substrate and arranged in rows and columns to form a matrix array, each of said transistors comprising: (a) a control electrode formed as a film on said transparent dielectric substrate; (b) a first insulator film formed on said control electrode; (c) a second insulator film formed on said first insulator film; (d) an amorphous silicon semiconductor layer formed on said second insulator film; (e) a first electrode formed on said amorphous silicon semiconductor layer; and (f) a second electrode formed on said amorphous silicon semiconductor layer; said matrix array further comprising: (a) a plurality of transparent electrodes formed on said transparent dielectric substrate, contacting said respective second electrodes; (b) row interconnection layers interconnecting said control electrodes of said transistors of said respective rows; and (c) column interconnection layers interconnecting said first electrodes of said transistors of said respective columns; wherein said control electrodes and said row interconnection layers are formed of an alloy of cobalt and tantalum; and, wherein said first insulator film of each of said transistors is composed of an anodized surface of said control electrode and said row interconnection layers.
Claim 4
Dependent Claim
199 words
A thin film transistor matrix, comprising: a plurality of thin-film transistors formed on a transparent dielectric substrate and arranged in rows and columns to form a matrix array, each of said transistors comprising: (a) a control electrode formed as a film on said transparent dielectric substrate; (b) a first insulator film formed on said control electrode; (c) a second insulator film formed on said first insulator film; (d) an amorphous silicon semiconductor layer formed on said second insulator film; (e) a first electrode formed on said amorphous silicon semiconductor layer; and (f) a second electrode formed on said amorphous silicon semiconductor layer; said matrix array further comprising: (a) a plurality of transparent electrodes formed on said transparent dielectric substrate, contacting said respective second electrodes; (b) row interconnection layers interconnecting said control electrodes of said transistors of said respective rows; and (c) column interconnection layers interconnecting said first electrodes of said transistors of said respective columns; wherein said control electrodes and said row interconnection layers are formed of an alloy of cobalt and tantalum; and, wherein said first insulator film of each of said transistors is composed of an anodized surface of said control electrode and said row interconnection layers.
Claim 5
Dependent Claim
199 words
A thin film transistor matrix, comprising: a plurality of thin-film transistors formed on a transparent dielectric substrate and arranged in rows and columns to form a matrix array, each of said transistors comprising: (a) a control electrode formed as a film on said transparent dielectric substrate; (b) a first insulator film formed on said control electrode; (c) a second insulator film formed on said first insulator film; (d) an amorphous silicon semiconductor layer formed on said second insulator film; (e) a first electrode formed on said amorphous silicon semiconductor layer; and (f) a second electrode formed on said amorphous silicon semiconductor layer; said matrix array further comprising: (a) a plurality of transparent electrodes formed on said transparent dielectric substrate, contacting said respective second electrodes; (b) row interconnection layers interconnecting said control electrodes of said transistors of said respective rows; and (c) column interconnection layers interconnecting said first electrodes of said transistors of said respective columns; wherein said control electrodes and said row interconnection layers are formed of an alloy of rhodium and tantalum; and, wherein said first insulator film of each of said transistors is composed of an anodized surface of said control electrode and said row interconnection layers.
Claim 6
Dependent Claim
199 words
A thin film transistor matrix, comprising: a plurality of thin-film transistors formed on a transparent dielectric substrate and arranged in rows and columns to form a matrix array, each of said transistors comprising: (a) a control electrode formed as a film on said transparent dielectric substrate; (b) a first insulator film formed on said control electrode; (c) a second insulator film formed on said first insulator film; (d) an amorphous silicon semiconductor layer formed on said second insulator film; (e) a first electrode formed on said amorphous silicon semiconductor layer; and (f) a second electrode formed on said amorphous silicon semiconductor layer; said matrix array further comprising: (a) a plurality of transparent electrodes formed on said transparent dielectric substrate, contacting said respective second electrodes; (b) row interconnection layers interconnecting said control electrodes of said transistors of said respective rows; and (c) column interconnection layers interconnecting said first electrodes of said transistors of said respective columns; wherein said control electrodes and said row interconnection layers are formed of an alloy of rhodium and tantalum; and, wherein said first insulator film of each of said transistors is composed of an anodized surface of said control electrode and said row interconnection layers.
Claim 7
Dependent Claim
199 words
A thin film transistor matrix, comprising: a plurality of thin-film transistors formed on a transparent dielectric substrate and arranged in rows and columns to form a matrix array, each of said transistors comprising: (a) a control electrode formed as a film on said transparent dielectric substrate; (b) a first insulator film formed on said control electrode; (c) a second insulator film formed on said first insulator film; (d) an amorphous silicon semiconductor layer formed on said second insulator film; (e) a first electrode formed on said amorphous silicon semiconductor layer; and (f) a second electrode formed on said amorphous silicon semiconductor layer; said matrix array further comprising: (a) a plurality of transparent electrodes formed on said transparent dielectric substrate, contacting said respective second electrodes; (b) row interconnection layers interconnecting said control electrodes of said transistors of said respective rows; and (c) column interconnection layers interconnecting said first electrodes of said transistors of said respective columns; wherein said control electrodes and said row interconnection layers are formed of an alloy of iridium and tantalum; and, wherein said first insulator film of each of said transistors is composed of an anodized surface of said control electrode and said row interconnection layers.
Claim 8
Dependent Claim
199 words
A thin film transistor matrix, comprising: a plurality of thin-film transistors formed on a transparent dielectric substrate and arranged in rows and columns to form a matrix array, each of said transistors comprising: (a) a control electrode formed as a film on said transparent dielectric substrate; (b) a first insulator film formed on said control electrode; (c) a second insulator film formed on said first insulator film; (d) an amorphous silicon semiconductor layer formed on said second insulator film; (e) a first electrode formed on said amorphous silicon semiconductor layer; and (f) a second electrode formed on said amorphous silicon semiconductor layer; said matrix array further comprising: (a) a plurality of transparent electrodes formed on said transparent dielectric substrate, contacting said respective second electrodes; (b) row interconnection layers interconnecting said control electrodes of said transistors of said respective rows; and (c) column interconnection layers interconnecting said first electrodes of said transistors of said respective columns; wherein said control electrodes and said row interconnection layers are formed of an alloy of iridium and tantalum; and, wherein said first insulator film of each of said transistors is composed of an anodized surface of said control electrode and said row interconnection layers.
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