Video image enlargement and reduction system and method

Claim 1

A video sweep synchronizing and address system having inputs to receive horizontal and vertical sweep synchronizing signals associated with a video signal, the system comprising: a phase locked loop having a two-input phase comparator that controls a voltage controlled oscillator, a first input to the phase comparator connected to the vertical sweep input of the system; a digital divider receiving at its input a first signal from the output of voltage controlled oscillator, the output of the digital divider connected to a second input to the phase comparator, the digital divider able to divide by an integer quantity "n"; a vertical address counter receiving at its input a second signal from the output of voltage controlled oscillator; a vertical sweep circuit such that the vertical dimension of an image can be controlled by adjusting the integer quantity "n"; a vertical address memory that receives a count value from the vertical address counter and is connected to the horizontal sweep input of the system such that count values are stored in synchronism with the horizontal sweep input the vertical address memory having means to output a vertical address value for use by the vertical sweep circuit; and a video memory connected to receive data from the vertical address memory.

Claim 12

A method of video image enlargement and reduction by a scaling factor in video system that uses vertical and horizontal raster sweep coordinated by horizontal and vertical sync signals, the method comprising the steps of: synthesizing a modified vertical sync signal by using a phase lock loop (PLL) circuit with a programmable divider in the feedback loop to lock an oscillator to the vertical sync signal; loading an integer value input by a user such that the denominator used by the programmable divider is substituted thereby, the integer value proportionate to the scaling factor; counter alternations of the output signal of the oscillator with a vertical address counter to arrive at a count value; storing said count value in a vertical address memory in synchronism with a horizontal sweep input signal; and indexing and accessing vertical addresses in video memory with said stored count values.

Claim 13

A method of video image enlargement and reduction by a scaling factor in video system that uses vertical and horizontal raster sweep coordinated by horizontal and vertical sync signals, the method comprising the steps of: synthesizing a modified vertical sync signal by using a phase lock loop (PLL) circuit with a programmable divider in the feedback loop to lock an oscillator to the vertical sync signal; loading an integer value input by a user such that the denominator used by the programmable divider is substituted thereby, the integer value proportionate to the scaling factor; counter alternations of the output signal of the oscillator with a vertical address counter to arrive at a count value; storing said count value in a vertical address memory in synchronism with a horizontal sweep input signal; and indexing and accessing vertical addresses in video memory with said stored count values.