US5068623A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High-gain amplifier with low noise and low power dissipation, using field effect transistors
Assignee: Instituto Nazionale di Fisica Nucleare INFN
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Filing: 1990-05-11
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Granted: 1991-11-26
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Expires: 2010-05-11
Abstract
Abstract The amplifier comprises a first field effect transistor controlled by the input signal of the amplifier and a current generator for the supply of said first transistor. The latter is biased so as to operate in its linear region and in cascade with it there is provided at least one second field effect transistor biased in a similar way, suitable for raising the output impedance of the amplifier, and thus its gain, to a value corresponding to the desired use.
Inventors
- 👤 Daniel V. Camin
- 👤 Gianluigi Pessina
- 👤 Ezio Previtali
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 11:19
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/08; H03F1/22; H03F1/226; H03F2200/00; H03F2200/372
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
120 words
A high-gain amplifier comprising: a first field effect transistor controlled by an input signal of the amplifier; at least one second field effect transistor connected in cascade with said first transistor; a first current generator for power supply of said first and second transistors; a second current generator for biasing said first and second transistors so as to cause them to operate in respective linear regions of their characteristics; said first and second current generators being substantially equal to each other and including each a resistance and two serially connected field effect transistors having gate terminals respectively connected to opposite ends of said resistance so as to cause said two transistors to operate in respective linear regions of their characteristics.
Claim 2
Dependent Claim
120 words
A high-gain amplifier comprising: a first field effect transistor controlled by an input signal of the amplifier; at least one second field effect transistor connected in cascade with said first transistor; a first current generator for power supply of said first and second transistors; a second current generator for biasing said first and second transistors so as to cause them to operate in respective linear regions of their characteristics; said first and second current generators being substantially equal to each other and including each a resistance and two serially connected field effect transistors having gate terminals respectively connected to opposite ends of said resistance so as to cause said two transistors to operate in respective linear regions of their characteristics.
Claim 3
Dependent Claim
233 words
The amplifier of claim 1, wherein the first current generator is connected between a drain of the second field effect transistor and a power supply; wherein the second current generator is connected between a gate of the second field effect transistor and the power supply; wherein the resistance included in the first current generator has a first terminal connected to a drain of the second field effect transistor comprising the amplifier and to a gate of a first of the two serially connected field effect transistors comprising the first current generator; wherein the resistance included in the first current generator has a second terminal connected to a source of the first of the two serially connected field effect transistors comprising the first current generator and to a gate of a second of the two serially connected field effect transistors comprising the first current generator; wherein the resistance included in the second current generator has a first terminal connected to a source of a first of the two serially connected field effect transistors comprising the second current generator and to a gate of a second of the two serially connected field effect transistors comprising the second current generator; wherein the resistance included in the second current generator has a second terminal connected to a gate of the first of the two serially connected field effect transistors comprising the first current generator and to ground.
Claim 4
Dependent Claim
18 words
An amplifier according to claim 1 characterized in that all the field effect transistors include two interconnected gates.
References Cited (Backward Citations)
US4100438A
Cited
US4952885A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-11-25 | 1995-05-27 | 1995-11-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-11-25 | 1999-05-27 | 1999-11-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-11-25 | 2003-05-27 | 2003-11-26 | $7700.00 | Window Closed / Lapsed |