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Method for driving a pnpn semiconductor device

Assignee: NEC Corp
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Filing: 1989-10-24
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Granted: 1991-11-12
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Expires: 2009-10-24
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Abstract

Abstract At least one electric pulse having a predetermined voltage which is higher than a switching voltage for a pnpn semiconductor device and a predetermined width is applied across the pnpn semiconductor device. The electric pulse width is set not to turn the pnpn semiconductor device on. Consequently, a predetermined amount of carriers are accumulated in the pnpn semiconductor device. In this circumstance, a trigger light is supplied to the pnpn semiconductor device to be turned on. As a result, an energy of the trigger light is largely decreased as compared to a conventional method.

Inventors

  • 👤 Kenichi Kasahara
  • 👤 Ichiro Ogura
  • 👤 Yoshiharu Tashiro

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 16:37
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/39; Y; Y10; Y10S; Y10S359/00; Y10S359/90

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 106 words
A method for driving a pnpn semiconductor device, comprising: applying an electric pulse having a predetermined voltage higher than a switching voltage and a predetermined width across said pnpn semiconductor device which is in the state of a high impedance, said predetermined width being set not to shift said pnpn semiconductor device to the state of a low impedance; and supplying a trigger light having a predetermined intensity and a predetermined width to said pnpn semiconductor device across which said electric pulse is applied, thereby shifting said pnpn semiconductor device to said state of said low impedance in cooperation with the application of said electric pulse.
Claim 2
Independent Claim 106 words
A method for driving a pnpn semiconductor device, comprising: applying an electric pulse having a predetermined voltage higher than a switching voltage and a predetermined width across said pnpn semiconductor device which is in the state of a high impedance, said predetermined width being set not to shift said pnpn semiconductor device to the state of a low impedance; and supplying a trigger light having a predetermined intensity and a predetermined width to said pnpn semiconductor device across which said electric pulse is applied, thereby shifting said pnpn semiconductor device to said state of said low impedance in cooperation with the application of said electric pulse.
Claim 3
Independent Claim 146 words
A method for driving a pnpn semiconductor device, comprising: applying a first electric pulse having a first predetermined voltage higher than a switching voltage and a first predetermined width across said pnpn semiconductor device which is in the state of a high impedance, said predetermined width being set not to shift said pnpn semiconductor device to the state of a low impedance state; applying a second electric pulse having a second predetermined voltage lower than said switching voltage and a second predetermined width across said pnpn semiconductor device after the application of said first electric pulse; and supplying a trigger light having a predetermined intensity and predetermined width to said pnpn semiconductor device across which said second electric pulse is applied, thereby shifting said pnpn semiconductor device to said state of said low impedance in cooperation with the application of said first and second electric pulses.
Claim 4
Independent Claim 146 words
A method for driving a pnpn semiconductor device, comprising: applying a first electric pulse having a first predetermined voltage higher than a switching voltage and a first predetermined width across said pnpn semiconductor device which is in the state of a high impedance, said predetermined width being set not to shift said pnpn semiconductor device to the state of a low impedance state; applying a second electric pulse having a second predetermined voltage lower than said switching voltage and a second predetermined width across said pnpn semiconductor device after the application of said first electric pulse; and supplying a trigger light having a predetermined intensity and predetermined width to said pnpn semiconductor device across which said second electric pulse is applied, thereby shifting said pnpn semiconductor device to said state of said low impedance in cooperation with the application of said first and second electric pulses.
Claim 5
Independent Claim 153 words
A method for driving a pnpn semiconductor device, comprising: applying a first electric pulse having a first predetermined voltage higher than a switching voltage and a first predetermined width across said pnpn semiconductor device which is in the state of a high impedance, thereby shifting said pnpn semiconductor device to the state of a low impedance; applying a second electric pulse having a second predetermined voltage lower than said switching voltage and a second predetermined width across said pnpn semiconductor device which is in said state of said low impedance, thereby shifting said pnpn semiconductor device back to said state of said high impedance; and supplying a trigger light having a predetermined intensity and a predetermined width to said pnpn semiconductor device across which said second electric pulse is applied, thereby shifting said pnpn semiconductor device to said state of said low impedance in cooperation with the application of said first electric pulse.
Claim 6
Independent Claim 153 words
A method for driving a pnpn semiconductor device, comprising: applying a first electric pulse having a first predetermined voltage higher than a switching voltage and a first predetermined width across said pnpn semiconductor device which is in the state of a high impedance, thereby shifting said pnpn semiconductor device to the state of a low impedance; applying a second electric pulse having a second predetermined voltage lower than said switching voltage and a second predetermined width across said pnpn semiconductor device which is in said state of said low impedance, thereby shifting said pnpn semiconductor device back to said state of said high impedance; and supplying a trigger light having a predetermined intensity and a predetermined width to said pnpn semiconductor device across which said second electric pulse is applied, thereby shifting said pnpn semiconductor device to said state of said low impedance in cooperation with the application of said first electric pulse.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-11-11 1995-05-13 1995-11-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-11-11 1999-05-13 1999-11-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-11-11 2003-05-13 2003-11-12 $7700.00 Window Closed / Lapsed

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