Semiconductor photoelectric device having a matrix wiring section

Claim 2

A semiconductor device comprising: m×n functional elements for processing signals, wherein m and n are each predetermined positive integers; a matrix wiring section comprising a wiring lamination structure comprising plural wiring layers having at least, a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, and a third conductive layer provided on said semiconductor layer; and m×n switching means arranged such that said m×n functional elements transfer the signals to said matrix wiring section under control of said switching means, wherein said wiring section is provided on a common substrate with said switching means.

Claim 3

A semiconductor device according to claim 1, wherein said switching means comprises plural main electrodes, wherein said main electrodes of said switching means and said third conductive layer comprise a common conductive layer.

Claim 4

A semiconductor device according to claim 1, wherein said switching means comprises an insulated gate transistor comprising a switched lamination structure comprising plural switched layers having at least, a control electrode, a switched insulating layer provided on said control electrode, a switched semiconductor layer provided on said switched insulating layer and a main electrode provided on said switched semiconductor layer, wherein said control electrode is substantially coplanar with said second conductive layer, wherein said switched insulating layer is substantially coplanar with said second insulating layer, wherein said switched semiconductor layer is substantially coplanar with said semiconductor layer, and wherein said main electrode is substantially coplanar with said third conductive layer of said matrix wiring.

Claim 5

A semiconductor device with a photoelectric conversion function comprising: m×n photoelectric conversion elements, m and n each being a predetermined positive integer; and a matrix wiring section comprising a matrix lamination structure comprising plural matrix layers having at least, a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, and a third conductive layer provided on said semiconductor layer; and m×n switching means, being organized into m blocks, arranged such that said photoelectric conversion elements transfer signals to said matrix wiring section under control of said switching means, said switching means and said matrix wiring being formed on a common substrate, and said switching being activated in each of the m blocks.

Claim 6

A semiconductor device with a photoelectric conversion function comprising: m×n photoelectric conversion elements, m and n each being a predetermined positive integer; and a matrix wiring section comprising a matrix lamination structure comprising plural matrix layers having at least, a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, and a third conductive layer provided on said semiconductor layer; and m×n switching means, being organized into m blocks, arranged such that said photoelectric conversion elements transfer signals to said matrix wiring section under control of said switching means, said switching means and said matrix wiring being formed on a common substrate, and said switching being activated in each of the m blocks.

Claim 7

A semiconductor device according to claim 4, wherein said switching means comprises plural main electrodes, wherein said photoelectric elements comprise plural electrodes, and wherein said main electrodes of said switching means, said electrodes of said photoelectric elements, and said third conductive layer comprise a common conductive layer.

Claim 8

A semiconductor device according to claim 4, wherein said electric conversion elements comprise a photoconductive semiconductor layer, wherein said switching means comprises an insulating gate transistor comprising a switched laminating structure comprising plural switched layers having at least, a control electrode layer, a switched insulating layer provided on said control electrode, a switched semiconductor layer provided on said switched insulating layer, and a main electrode layer provided on said switched semiconductor layer, wherein said control electrode is substantially coplanar with said second conductive layer, wherein said switched insulating layer is substantially coplanar with said second insulating layer, wherein said switched semiconductor layer is substantially coplanar with said semiconductor layer, wherein said main electrode is substantially coplanar with said third conductive layer of said matrix wiring, and wherein said photoconductive semiconductor layer is substantially coplanar with said semiconductor layer of said matrix wiring.

Claim 9

A semiconductor device comprising: m×n charge storage means for storing charges, m and n each being a positive integer; a matrix wiring wherein said matrix wiring section and said charge storage means comprise a lamination structure comprising plural layers having at least, a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, and a third conductive layer provided on said semiconductor layer, and wherein each layer of said matrix wiring section and each layer of said charge storage means comprise a common layer; and m×n switching means arranged such that said charge storage means transfers the stored charges to said matrix wiring under control of said switching means, wherein said matrix wiring and said switching means are disposed on a common substrate.

Claim 10

A semiconductor device comprising: m×n charge storage means for storing charges, m and n each being a positive integer; a matrix wiring wherein said matrix wiring section and said charge storage means comprise a lamination structure comprising plural layers having at least, a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, and a third conductive layer provided on said semiconductor layer, and wherein each layer of said matrix wiring section and each layer of said charge storage means comprise a common layer; and m×n switching means arranged such that said charge storage means transfers the stored charges to said matrix wiring under control of said switching means, wherein said matrix wiring and said switching means are disposed on a common substrate.

Claim 11

A semiconductor device according to claim 7, wherein said switching means comprises an insulated gate transistor comprising a switched lamination structure having plural layers comprising at least, a control electrode, a switched insulating layer provided on said control electrode, a switched semiconductor layer provided on said switched insulating layer, and a main electrode provided on said switched semiconductor layer, wherein said control electrode is substantially coplanar with said second conductive layer, wherein said switched insulating layer is substantially coplanar with said second insulating layer, wherein said switched semiconductor layer is substantially coplanar with said semiconductor layer, and wherein said main electrode is substantially coplanar with said third conductive layer of said matrix wiring section and said charge storage means.

Claim 12

A semiconductor device comprising: m×n photoelectric conversion elements wherein m×n are each predetermined positive integers; charge storage means for storing signal charges photoelectrically converted by said photoelectric conversion elements; a matrix wiring, wherein said matrix wiring and said charge storage means comprise a wiring lamination structure having plural layers comprising a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, a third conductive layer provided on said semiconductor layer, and wherein each layer of said matrix wiring is in common with a respective layer of said charge storage means; and m×n switching means arranged such that said storage means transfers the stored charges to said matrix wiring under control of said switching means, wherein said matrix wiring and said switching means are disposed on a common substrate.

Claim 13

A semiconductor device comprising: m×n photoelectric conversion elements wherein m×n are each predetermined positive integers; charge storage means for storing signal charges photoelectrically converted by said photoelectric conversion elements; a matrix wiring, wherein said matrix wiring and said charge storage means comprise a wiring lamination structure having plural layers comprising a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, a third conductive layer provided on said semiconductor layer, and wherein each layer of said matrix wiring is in common with a respective layer of said charge storage means; and m×n switching means arranged such that said storage means transfers the stored charges to said matrix wiring under control of said switching means, wherein said matrix wiring and said switching means are disposed on a common substrate.

Claim 14

A semiconductor device according to claim 9, wherein said photoelectric conversion comprises a photoelectric semiconductor layer, said switching means comprises an insulated gate transistor comprising a switched lamination structure having plural layers comprising at least a control electrode, a switched insulating layer provided on said control electrode, a switched semiconductor layer provided on said switched insulating layer, and a main electrode provided on said switched semiconductor layer, wherein said control electrode is substantially coplanar with said second conductive layer, wherein said switched insulating layer is substantially coplanar with said second insulating layer, and wherein said switched semiconductor layer and said photoelectric semiconductor layer are disposed on a layer common to and continuous with said semiconductor layer of said matrix wiring.

Claim 15

A semiconductor device comprising: m×n charge storage means for storing charges; a matrix wiring section and wherein at least a part of said matrix wiring section comprises a lamination structure having plural layers comprising a portion of: a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, and a third conductive layer provided on said semiconductor layer; wherein said charge storage means comprises plural layers at least, other portions of: said first conductive layer, said first insulating layer, and said second conductive layer; and m×n switching means arranged such that said m×n charge storage means transfers the stored charges to said matrix wiring under control of said switching means.

Claim 16

A semiconductor device comprising: m×n charge storage means for storing charges; a matrix wiring section and wherein at least a part of said matrix wiring section comprises a lamination structure having plural layers comprising a portion of: a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, and a third conductive layer provided on said semiconductor layer; wherein said charge storage means comprises plural layers at least, other portions of: said first conductive layer, said first insulating layer, and said second conductive layer; and m×n switching means arranged such that said m×n charge storage means transfers the stored charges to said matrix wiring under control of said switching means.

Claim 17

A semiconductor device according to claim 11, wherein said switching means comprises an insulated gate transistor comprising a switched lamination structure comprising plural switched layers comprising a control electrode, a switched insulating layer provided on said control electrode, a switched semiconductor layer provided on said switched insulating layer, a main electrode layer provided on said switched semiconductor layer, wherein said control electrode layer is substantially coplanar with said second conductive layer, wherein said switched insulating layer is substantially coplanar with said second insulating layer, and wherein said switched semiconductor layer is substantially coplanar with said semiconductor layer of said matrix wiring.

Claim 18

A photoelectric conversion device comprising: a photoelectric conversion element; a charge storage means for storing signal charges from the photoelectric conversion element; a matrix wiring; a switch means arranged such that said charge storage means transfer charges to said matrix wiring under control of said switch means, wherein said matrix wiring and said switch means are disposed on a common substrate, wherein said matrix wiring comprises a lamination structure comprising at least a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, and a third conductive layer provided on said semiconductor layer, wherein said charge storage means comprises, at least, a fourth conductive layer disposed substantially coplanar with said first conductive layer, a third insulating layer provided on said third conductive layer and disposed substantially coplanar with said first insulating layer, and a fifth conductive layer provided on said third insulating layer and disposed substantially coplanar to said second conductive layer.

Claim 19

A photoelectric conversion device comprising: a photoelectric conversion element; a charge storage means for storing signal charges from the photoelectric conversion element; a matrix wiring; a switch means arranged such that said charge storage means transfer charges to said matrix wiring under control of said switch means, wherein said matrix wiring and said switch means are disposed on a common substrate, wherein said matrix wiring comprises a lamination structure comprising at least a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, and a third conductive layer provided on said semiconductor layer, wherein said charge storage means comprises, at least, a fourth conductive layer disposed substantially coplanar with said first conductive layer, a third insulating layer provided on said third conductive layer and disposed substantially coplanar with said first insulating layer, and a fifth conductive layer provided on said third insulating layer and disposed substantially coplanar to said second conductive layer.

Claim 20

A device according to claim 13, wherein said photoelectric conversion element comprises a photosensitive photo-conductive layer, wherein said switch means comprises an insulated gate transistor comprising a switched lamination structure comprising at least, a control electrode, a switched insulating layer provided on said control electrode, a switched semiconductor layer provided on said switched insulating layer, and a main electrode provided on said switched semiconductor layer, wherein said control electrode is formed from said second conductive layer, wherein said switched insulating layer is formed from said second insulating layer, and wherein said switched semiconductor layer and said photosensitive photoconductive layer are formed from a common layer continuous with said semiconductor layer of said matrix wiring.

Claim 21

A device according to claim 4, 9 or 13, wherein said photoelectric conversion element, said switch means, and said matrix wiring section are disposed adjacent to each other on said substrate.

Claim 22

A device according to claim 4, 9 or 13, wherein said semiconductor layer comprises an amorphous silicon.

Claim 23

A device according to claim 4, 9 or 13 wherein said first insulating layer comprises a material selected from the group consisting of a silicon oxide and a silicon nitride.

Claim 24

A device according to claim 4, 9 or 13 wherein said second insulating layer comprises a material selected from the group consisting of a polyamide, a silicon nitride, and silicon oxide.

Claim 25

A device according to claim 4, 9 or 13 wherein said matrix wiring section comprises a shield wiring.

Claim 26

A device according to claim 4 or 9, wherein said photoelectric conversion element, said charge storage means, said switch means, and said matrix wiring section are disposed adjacent to each other on said substrate.

Claim 27

A device according to claim 13, wherein said matrix wiring section comprises a matrix wiring provided on said charge storage means.

Claim 28

A device according to claim 4, 9 or 13, further comprising a semiconductor device having a photoelectric conversion function comprising an input section; and a power source for driving said semiconductor device.

Claim 29

An image reading apparatus comprising: a semiconductor device with a photoelectric conversion function comprising: m×n photoelectric conversion elements, m and n each being a predetermined positive integer, a matrix wiring section comprising a matrix lamination structure comprising plural matrix layers having at least, a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, and a third conductive layer provided on said semiconductor layer, and m×n switching means, being organized into m blocks, arranged such that said photoelectric conversion elements transfer signals to said matrix wiring section under control of said switching means, said switching means and said matrix wiring being formed on a common substrate, and said switching being activated in each of the m blocks; a head for recording an image; and a power source for driving the semiconductor device and the head.

Claim 30

An image reading apparatus comprising: a semiconductor device with a photoelectric conversion function comprising: m×n photoelectric conversion elements, m and n each being a predetermined positive integer, a matrix wiring section comprising a matrix lamination structure comprising plural matrix layers having at least, a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, and a third conductive layer provided on said semiconductor layer, and m×n switching means, being organized into m blocks, arranged such that said photoelectric conversion elements transfer signals to said matrix wiring section under control of said switching means, said switching means and said matrix wiring being formed on a common substrate, and said switching being activated in each of the m blocks; a head for recording an image; and a power source for driving the semiconductor device and the head.

Claim 31

An image reading apparatus comprising: a semiconductor device comprising: m×n photoelectric conversion elements wherein m×n are each predetermined positive integers, charge storage means for storing signal charges photoelectrically converted by said photoelectric conversion element, a matrix wiring, wherein said matrix wiring and said charge storage means comprise a wiring lamination structure having plural layers comprising a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, a third conductive layer provided on said semiconductor layer, and wherein each layer of said matrix wiring is in common with respective layer of said charge storage means, and m×n switching means arranged such that said storage means transfers the stored charges to said matrix wiring under control of said switching means, wherein said matrix wiring and said switching means are disposed on a common substrate; a head for recording an image; and a power source for driving the semiconductor device and the head.

Claim 32

An image reading apparatus comprising: a semiconductor device comprising: m×n photoelectric conversion elements wherein m×n are each predetermined positive integers, charge storage means for storing signal charges photoelectrically converted by said photoelectric conversion element, a matrix wiring, wherein said matrix wiring and said charge storage means comprise a wiring lamination structure having plural layers comprising a first conductive layer, a first insulating layer provided on said first conductive layer, a second conductive layer provided on said first insulating layer, a second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, a third conductive layer provided on said semiconductor layer, and wherein each layer of said matrix wiring is in common with respective layer of said charge storage means, and m×n switching means arranged such that said storage means transfers the stored charges to said matrix wiring under control of said switching means, wherein said matrix wiring and said switching means are disposed on a common substrate; a head for recording an image; and a power source for driving the semiconductor device and the head.

Claim 33

An image reading apparatus comprising: a semiconductor device comprising: a photoelectric conversion element, a charge storage means for storing signal charges from the photoelectric conversion element, a matrix wiring, a switch mean arranged such that said charge storage means transfers charges to said matrix wiring under control of said switch means, wherein said matrix wiring and said switch means are disposed on a common substrate, wherein said matrix wiring comprises a lamination structure comprises at least a first conductive layer, a first insulating layer provided on said first conductive layer, second conductive layer provided on said first insulating layer, second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, and a third conductive layer provided on said semiconductor layer, and wherein said charge storage means comprises, at least, a fourth conductive layer disposed substantially coplanar with said first conductive layer, a third insulating layer provided on said third conductive layer and disposed substantially coplanar with said first insulating layer, and a fifth conductive layer provided on said third insulating layer and disposed substantially coplanar to said second conductive layer; a head for recording an image; and a power source for driving the semiconductor device and the head.

Claim 34

An image reading apparatus comprising: a semiconductor device comprising: a photoelectric conversion element, a charge storage means for storing signal charges from the photoelectric conversion element, a matrix wiring, a switch mean arranged such that said charge storage means transfers charges to said matrix wiring under control of said switch means, wherein said matrix wiring and said switch means are disposed on a common substrate, wherein said matrix wiring comprises a lamination structure comprises at least a first conductive layer, a first insulating layer provided on said first conductive layer, second conductive layer provided on said first insulating layer, second insulating layer provided on said second conductive layer, a semiconductor layer provided on said second insulating layer, and a third conductive layer provided on said semiconductor layer, and wherein said charge storage means comprises, at least, a fourth conductive layer disposed substantially coplanar with said first conductive layer, a third insulating layer provided on said third conductive layer and disposed substantially coplanar with said first insulating layer, and a fifth conductive layer provided on said third insulating layer and disposed substantially coplanar to said second conductive layer; a head for recording an image; and a power source for driving the semiconductor device and the head.