CMOS output circuit using a low threshold device

Claim 1

A complementary metal-oxide semicondutor (CMOS) driver circuit for tolerating a high voltage at its output comprising: a p-channel transistor having its source coupled to a supply voltage and its gate coupled to accept an input signal; a first n-channel transistor having substantially zero threshold level for preventing a high voltage approaching said supply voltage from being coupled to the drain of said p-channel transistor, wherein said first n-channel transistor has its drain coupled to the drain of said p-channel transistor, its gate coupled to a power voltage and its source coupled to an output terminal; a second n-channel transistor having its drain coupled to said output terminal and to the source of said first n-channel transistor, its source coupled to a return of said supply voltage, and its gate coupled to accept said input signal; said p-channel transistor and said second n-channel transistor operating as a CMOS driver, wherein said first n-channel transistor provides for substantially zero volts to be dropped across it when conducting, wherein said first n-channel transistor ceases conduction and disconnects said p-channel transistor from said output terminal in order to prevent destruction of said p-channel transistor when said high voltage approaching said supply voltage is impressed at said output terminal.