US5057186A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of taper-etching with photoresist adhesion layer
Assignee: Nokia Bell Labs
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Filing: 1990-10-12
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Granted: 1991-10-15
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Expires: 2010-10-12
Abstract
Abstract In a two-step etching process for making tapered contact openings in a dieletric, a thin layer of a material is interposed to serve as an adhesive between the dielectric and a photoresist layer the thin layer of material is chosen to remain essentially intact during undercut partial etching of the dielectric. As a result of enhanced adhesion, the photoresist layer remains more accurately positioned for subsequent anisotropic etching across the remainder of the thickness of the dielectric.
Inventors
- 👤 Hongzong Chew
- 👤 Catherine A. Fieber
- 👤 Graham W. Hills
- 👤 Edward P. Martin, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 20:23
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/20; H10P50/28; H10P50/286; H10P50/287; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/081; H10W20/082
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
132 words
A method for making an integrated circuit comprising the steps of: making a dielectric opening in a dielectric, said dielectric opening being etched in the presence of a patterned photoresist layer, said photoresist layer having a photoresist opening with a first dimension, said etching comprising a first step of isotropic etching followed by a second step of essentially anisotropic etching, and prior to deposition of said photoresist layer, there being an additional layer deposited on said dielectric, the material of said additional layer being selected to enchance adhesion of said photoresist layer, said additional layer being etched to create an additional layer opening with a second dimension prior to said etching of said dielectric, said second dimension remaining substantially equal to said first dimension during both said isotropic and said anisotropic etching.
Claim 2
Independent Claim
132 words
A method for making an integrated circuit comprising the steps of: making a dielectric opening in a dielectric, said dielectric opening being etched in the presence of a patterned photoresist layer, said photoresist layer having a photoresist opening with a first dimension, said etching comprising a first step of isotropic etching followed by a second step of essentially anisotropic etching, and prior to deposition of said photoresist layer, there being an additional layer deposited on said dielectric, the material of said additional layer being selected to enchance adhesion of said photoresist layer, said additional layer being etched to create an additional layer opening with a second dimension prior to said etching of said dielectric, said second dimension remaining substantially equal to said first dimension during both said isotropic and said anisotropic etching.
Claim 3
Dependent Claim
33 words
The method of claim 1 in which said dielectric comprises a material selected from the group consisting of silicon dioxide, silicon nitride, silicon oxynitride, aluminum oxide, borosilicate glass, phosphosilicate glass, and borophosphosilicate glass.
Claim 4
Dependent Claim
30 words
The method of claim 1 in which said additional layer comprises a material selected from the group consisting of silicon, silicon nitride, titanium nitride, titanium oxide, titanium oxynitride, and titanium-tungsten.
Claim 5
Dependent Claim
19 words
The method of claim 3, said additional layer having a thickness in the range from 100 to 200 angstroms.
Claim 6
Dependent Claim
25 words
The method of claim 1 in which said dielectric consists essentially of silicon dioxide, and in which a fluorocarbon chemistry is used for anisotropic etching.
Claim 7
Dependent Claim
15 words
The method of claim 1 in which essentially anisotropic etching is effective by reactive-ion etching.
Claim 8
Dependent Claim
16 words
The method of claim 1, integrated-circuit design rule being less than or equal to 3 micrometers.
Claim 9
Dependent Claim
31 words
The method of claim 1, further comprising making at least two said dielectric openings, said dielectric openings having centers which are spaced apart by less than or equal to 5 micrometers.
Claim 10
Dependent Claim
13 words
The method of claim 1 in which said dielectric material is conformally deposited.
Claim 11
Dependent Claim
13 words
The method of claim 1 in which said dielectric material has been planarized.
Claim 12
Dependent Claim
11 words
The method of claim 1, said dielectric opening exposing semiconductor material.
Claim 13
Dependent Claim
12 words
The method of claim 1, said dielectric opening exposing a conductor material.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-10-14 | 1995-04-15 | 1995-10-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-10-14 | 1999-04-15 | 1999-10-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-10-14 | 2003-04-15 | 2003-10-15 | $7700.00 | Window Closed / Lapsed |