Analog multiplier in the feedback loop of a switching regulator

Claim 2

In an integrated circuit for use in implementing a feed back loop in a switching voltage regulator circuit, the switching voltage regulator circuit including an input for connection to a source of input voltage for the switching voltage regulator circuit, a current switching means, oscillator means for controlling the one and off switching frequency of the current switching means, and further including error amplifier means in the feedback loop, the integrated circuit comprising: analog multiplier means for providing a signal to control the on and off switching duty cycle of the current switching means, the signal having a magnitude which varies immediately with and substantially in proportion to changes in a value equal to the magnitude of an error signal from the error amplifier means divided by the magnitude of the input voltage of the switching voltage regulator circuit.

Claim 3

The integrated circuit of claim 1, wherein the analog multiplier means comprises a circuit that multiplies the error signal by a reference value and divides the product of the reference value and the error signal by the input voltage.

Claim 4

The integrated circuit of claim 2, wherein the reference value comprises the magnitude of a reference current conducted by the analog multiplier circuit.

Claim 5

The integrated circuit of claim 3, wherein the switching regulator circuit includes a comparator circuit comprising a transistor having a base coupled to the oscillator means and the analog multiplier circuit, and wherein the comparator circuit transistor, the oscillator means and the analog multiplier circuit are coupled to a common circuit node.

Claim 6

The integrated circuit of claim 4, wherein the reference signal from the oscillator means comprises a ramped voltage signal coupled to the common circuit node and the analog multiplier circuit subtracts from the ramped voltage signal to set the base voltage of the comparator circuit transistor.

Claim 7

In an integrated circuit for use in a switching voltage regulator circuit, the switching voltage regulator circuit having an input for connection to a source of input voltage for the switching voltage regulator circuit, and providing a regulated output voltage at a regulator output terminal, the integrated circuit including: a switching transistor; an input terminal for accepting an input voltage for the integrated circuit; an error amplifier means for accepting a feedback signal from the output of the switching voltage regulator circuit and for providing at an error amplifier output an error signal indicative of changes in the feedback signal relative to a reference value; control means coupled to the error amplifier output and to the switching transistor and responsive to the error signal for varying the on and off switching duty cycle of the switching transistor, the control means including a feedforward compensation circuit capable of inversely varying the switching duty cycle in immediate response to a change in the switching regulator circuit input voltage, the feedforward compensation circuit comprising: an analog multiplier circuit having an output coupled to the control means for providing a control signal to control the switching duty cycle of the switching transistor, a first input coupled to the error amplifier output and a second input coupled to the input terminal of the integrated circuit, the analog multiplier circuit providing at its output a control signal which varies in substantial proportion to changes in a quotient resulting from the division of the error signal provided at the output of the error amplifier by the voltage at the input terminal of the integrated circuit.

Claim 8

In an integrated circuit for use in a switching voltage regulator circuit, the switching voltage regulator circuit having an input for connection to a source of input voltage for the switching voltage regulator circuit, and providing a regulated output voltage at a regulator output terminal, the integrated circuit including: a switching transistor; an input terminal for accepting an input voltage for the integrated circuit; an error amplifier means for accepting a feedback signal from the output of the switching voltage regulator circuit and for providing at an error amplifier output an error signal indicative of changes in the feedback signal relative to a reference value; control means coupled to the error amplifier output and to the switching transistor and responsive to the error signal for varying the on and off switching duty cycle of the switching transistor, the control means including a feedforward compensation circuit capable of inversely varying the switching duty cycle in immediate response to a change in the switching regulator circuit input voltage, the feedforward compensation circuit comprising: an analog multiplier circuit having an output coupled to the control means for providing a control signal to control the switching duty cycle of the switching transistor, a first input coupled to the error amplifier output and a second input coupled to the input terminal of the integrated circuit, the analog multiplier circuit providing at its output a control signal which varies in substantial proportion to changes in a quotient resulting from the division of the error signal provided at the output of the error amplifier by the voltage at the input terminal of the integrated circuit.

Claim 9

The analog multiplier circuit of claim 6, wherein the first input comprises a transistor having its base coupled to the error amplifier output such that the collector-emitter circuit of the transistor conducts a current proportional to a voltage signal at the error amplifier output.

Claim 10

The analog multiplier circuit of claim 7, wherein the second input comprises a resistor coupled on one end to the input terminal of the integrated circuit and on the other end to a current mirror circuit.

Claim 11

The analog multiplier circuit of claim 8, wherein the current mirror circuit is coupled to the base of a transistor, the collector of the transistor comprising the output of the analog multiplier circuit.