Abstract A reverse staggered type silicon thin film transistor includes a substrate having a gate electrode; a gate insulating layer on the substrate and the gate electrode, the gate insulating layer having a transistor-forming portion; a lower layer silicon film on the transistor-forming portion of the gate insulating layer and in contact therewith, the lower layer silicon film being formed at a first temperature and with a first thickness; an upper layer silicon film formed on the transistor-forming portion of the gate insulating layer at a second temperature which is lower than the first temperature and with a second thickness greater than the first thickness; an n-type silicon layer on the upper layer silicon film and in contact therewith; a source electrode on the n-type silicon layer; and a drain electrode on the n-type silicon layer.
A method of forming a reverse staggered type silicon thin film transistor, comprising the steps of: forming a gate electrode on a substrate; forming a gate insulating layer on said substrate and said gate electrode, said gate insulating layer having a transistor-forming portion; forming a lower layer silicon film at a first temperature on the transistor-forming portion of the gate insulating layer and in contact therewith; forming an intermediate silicon film on said lower layer silicon film; forming an upper layer silicon film on said intermediate silicon film at a second temperature which is lower than said first temperature; forming an n-type silicon layer on said upper layer silicon film and in contact therewith; and forming a source electrode and a drain electrode on said n-type silicon layer; said step of forming the intermediate silicon film including the step of forming the intermediate silicon film as the temperature gradually lowers from said first temperature to said second temperature.
Claim 2
Independent Claim
158 words
A method of forming a reverse staggered type silicon thin film transistor, comprising the steps of: forming a gate electrode on a substrate; forming a gate insulating layer on said substrate and said gate electrode, said gate insulating layer having a transistor-forming portion; forming a lower layer silicon film at a first temperature on the transistor-forming portion of the gate insulating layer and in contact therewith; forming an intermediate silicon film on said lower layer silicon film; forming an upper layer silicon film on said intermediate silicon film at a second temperature which is lower than said first temperature; forming an n-type silicon layer on said upper layer silicon film and in contact therewith; and forming a source electrode and a drain electrode on said n-type silicon layer; said step of forming the intermediate silicon film including the step of forming the intermediate silicon film as the temperature gradually lowers from said first temperature to said second temperature.