Apparatus utilizing a four state encoder for encoding and decoding A sliding block (1,7) code

Claim 1

An encoder/decoder system for encoding and decoding a run length limited code in accordance with the rule specifying a minimum of one and a maximum of seven 0's between adjacent ones, with a coding rate of 2/3, said encoder/ decoder system comprising: a. an encoder comprising means for receiving 2 input data bits, b. storage means for storing 2 present encoder state defining bits, said 2 present encoder state defining bits being derived from the immediately preceding encoding operation, and c. first logic circuit means for logically combining said 2 input data bits and said 2 present encoder state defining bits to produce 3 encoded output bits in accordance with said run length limited rules and to produce 2 next encoder state defining bits for storage in said storage means, in accordance with the following table: ______________________________________ INPUT BITS 00 01 10 11 ______________________________________ PRESENT 1 1,010 2,010 3,010 3,100 STATE 2 1,100 2,100 3,101 4,101 3 1,000 2,000 3,001 4,001 4 1,010 2,010 3,010 3,000 ______________________________________ LEGEND State: 1=00, 2=01, 3=10, 4=11 Leftmost bit=MSB Input Bits: 00, 01, 10, 11 Leftmost bit=MSB Table Entry: W,XYZ W=Next State XYZ= 3 Output Bits; X=MSB d. a decoder comprising a second logic circuit for decoding encoded bits, said second logic circuit having an output of 2 decoded bits for each of 3 of said encoded bits presented to said decoder in groups 3, in accordance with the following Boolean expressions: ##EQU3## Equation terms: ABC; Octal representation of 9 bits presented to said decoder in groups of 3, A=first group of 3 presented, B=second group of 3 presented, C=third group of 3 presented, x=don't care.