US5047667A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Voltage difference detector
Assignee: Ferranti International PLC
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Filing: 1990-01-19
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Granted: 1991-09-10
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Expires: 2010-01-19
Abstract
Abstract A circuit is provided to detect which of a simultaneous plurality of varying input signals has the dominant maximum amplitude. Two simultaneous input signals are compared with each other; or each of more than two simultaneous input signals is compared individually with a common, varying, comparing signal, provided in response to the summing of the input signals, and the subsequent scaling of the summation. The input signals, and a provided comparing signal, are different from each other, only, in amplitude. Normally there is expected, at least in relation to the input signal having the dominant maximum amplitude, to be a wide dynamic extent of amplitudes; whereas each signal supplied to a difference amplifier for such a comparison is arranged to have only a low amplitude, at least the dominant input signal being supplied so as to have only a range of amplitudes, as transmitted by an associated limiting amplifier in response to the receipt of the signal. The rate of change with time of a varying signal amplitude, resulting from each comparison of two signals, substantially is proportional to the difference between the maximum amplitudes of the signals compared. Thus, the detector is arranged so as not to be required to operate upon the whole of said normally expected wide dynamic extent of amplitudes of at least the dominant input signal.
Inventors
- 👤 James B. Howie
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 06:36
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/30
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
138 words
An electrical detector circuit arranged to detect which of a plurality of simultaneous varying input signals has a dominant maximum amplitude, the input signals being expected to have a wide dynamic range of amplitudes relative to whichever of said input signals has the dominant maximum amplitude and differing from one another only in amplitude, which detector circuit includes a separate limiting amplifier associated with each input signal and arranged to provide an output signal having an amplitude limited, when saturation of the amplifier occurs, to a value less than the said dominant maximum amplitude, and comparison means for comparing each said output signal with a variable comparing signal which differs from each input signal only in amplitude, said comparison means providing at least one output indicative of which of the simultaneous input signals has the dominant maximum amplitude.
Claim 2
Dependent Claim
138 words
An electrical detector circuit arranged to detect which of a plurality of simultaneous varying input signals has a dominant maximum amplitude, the input signals being expected to have a wide dynamic range of amplitudes relative to whichever of said input signals has the dominant maximum amplitude and differing from one another only in amplitude, which detector circuit includes a separate limiting amplifier associated with each input signal and arranged to provide an output signal having an amplitude limited, when saturation of the amplifier occurs, to a value less than the said dominant maximum amplitude, and comparison means for comparing each said output signal with a variable comparing signal which differs from each input signal only in amplitude, said comparison means providing at least one output indicative of which of the simultaneous input signals has the dominant maximum amplitude.
Claim 3
Dependent Claim
88 words
A circuit as claimed in claim 1 which includes means for deriving the variable comparing signal from the summation of the plurality of input signals, the output of each limiting amplifier being connected to a separate one of a like plurality of difference amplifiers to each of which is applied the variable comparing signal, the arrangement being such that one only of the difference amplifiers produces a signal indicating that the input signal having the dominant maximum amplitude is the input signal associated with said one difference amplifier.
Claim 4
Dependent Claim
128 words
An electrical detector circuit arranged to detect which of at least two simultaneous varying input signals has a dominant maximum amplitude, the input signals being expected to have a wide dynamic range of amplitudes relative to whichever of said input signals has the dominant maximum amplitude and differing from one another only in amplitude, which detector circuit includes a separate limiting amplifier associated with each input signal and arranged to provide an output signal having an amplitude limited, when saturation of the amplifier occurs, to a value less than the said dominant maximum amplitude, and comparison means for comparing each said output signal with a comparing signal, said comparison means providing at least one output indicative of which of the simultaneous input signals has the dominant maximum amplitude.
Claim 5
Dependent Claim
128 words
An electrical detector circuit arranged to detect which of at least two simultaneous varying input signals has a dominant maximum amplitude, the input signals being expected to have a wide dynamic range of amplitudes relative to whichever of said input signals has the dominant maximum amplitude and differing from one another only in amplitude, which detector circuit includes a separate limiting amplifier associated with each input signal and arranged to provide an output signal having an amplitude limited, when saturation of the amplifier occurs, to a value less than the said dominant maximum amplitude, and comparison means for comparing each said output signal with a comparing signal, said comparison means providing at least one output indicative of which of the simultaneous input signals has the dominant maximum amplitude.
Claim 6
Dependent Claim
83 words
A circuit as claimed in claim 3 in which said detector circuit is arranged to detect exactly two simultaneous varying input signals, there being only two limiting amplifiers associated with the two input signals, and wherein said comparison means compares the output signal of one of said two limiting amplifiers with the output signal of the other of said two limiting amplifiers, the output signal of each limiting amplifier serving as the comparing signal to the output signal of the other limiting amplifier.
Claim 7
Dependent Claim
65 words
A circuit as claimed in claim 3 wherein said comparison means compares each said output signal with a comparing signal which is variable and which differs from each input signal only in amplitude, and wherein the circuit is arranged to detect which of a plurality of more than two simultaneous varying input signals has a dominant maximum amplitude, there being more than two limiting amplifiers.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-09-09 | 1995-03-11 | 1995-09-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-09-09 | 1999-03-11 | 1999-09-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-09-09 | 2003-03-11 | 2003-09-10 | $7700.00 | Window Closed / Lapsed |