US5047655A
Expired / Lapsed
US
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Programmable analog neural network
Assignee: Thales SA
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Filing: 1990-03-01
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Granted: 1991-09-10
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Expires: 2010-03-01
Abstract
Abstract The neural network of the invention, of the type with a Cartesian matrix, has a first column of addition of the input signals, and at each intersection of the M lines and N columns it comprises a synapse constituted of a simple logic gate.
Inventors
- 👤 Emmanuel Chambost
- 👤 Francois Vallet
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 21:15
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/22; G06N; G06N3/00; G06N3/02; G06N3/06; G06N3/063; G06F; G06F15/00; G06F15/76; G06F15/80; G06N3/065
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
96 words
Programmable analogue neural network, of the type with a Cartesian matrix with N inputs and M outputs, comprising: a first addition circuit connected to the N inputs, said matrix further comprising N lines and M columns, the N.M synapses each being constituted by a logic gate, the M columns each being connected to a column addition circuit, another input of each of these column addition circuits being connected to the output of said first addition circuit and still another input of each of these column addition circuits being connected to a circuit producing an adjustable voltage.
Claim 2
Dependent Claim
96 words
Programmable analogue neural network, of the type with a Cartesian matrix with N inputs and M outputs, comprising: a first addition circuit connected to the N inputs, said matrix further comprising N lines and M columns, the N.M synapses each being constituted by a logic gate, the M columns each being connected to a column addition circuit, another input of each of these column addition circuits being connected to the output of said first addition circuit and still another input of each of these column addition circuits being connected to a circuit producing an adjustable voltage.
Claim 3
Dependent Claim
20 words
Neural network according to claim 1, wherein the circuit producing adjustable voltage includes a digital-to-analogue converter receiving a binary word.
Claim 4
Dependent Claim
15 words
Neural network according to claim 2, wherein the binary word can be modified by programming.
Claim 5
Dependent Claim
19 words
Neural network according to claim 1, wherein the synapses are manufactured using EEPROM technology with a floating gate transistor.
Claim 6
Dependent Claim
14 words
Neural network according to claim 1, wherein the synapses are manufactured using SRAM-CMOS technology.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-09-09 | 1995-03-11 | 1995-09-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-09-09 | 1999-03-11 | 1999-09-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-09-09 | 2003-03-11 | 2003-09-10 | $7700.00 | Window Closed / Lapsed |