Patent US5045685A successfully refreshed from Google Patents.
US5045685A
Expired / Lapsed
US
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Analog to digital conversion on multiple channel IC chips
Assignee: Irvine Sensors Corp
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Filing: 1990-06-06
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Granted: 1991-09-03
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Expires: 2010-06-06
Abstract
Abstract An integrated circuit chip having a plurality of parallel channels, and a stack of such chips, are disclosed, in which the function of A/D signal conversion is accomplished in each on-chip channel. In order to satisfy the power and real estate limitations of the chip(s), a substantial part of the A/D conversion circuitry is located off-chip. Two devices are required in each channel on each chip, a precision comparator, and a storage register. These may be combined with an off-chip analog ramp, and an off-chip digital ramp. Certain on-chip performance enhancements are disclosed, which can operate either in the analog mode or the digital mode. One such enhancement is compensating for the voltage offset of each comparator. Another enhancement is reducing the duty cycle of each precision comparator, in order to lower power requirements. An important use for the disclosed concepts is the field of multi-layer Z-technology modules, having two dimensional photo-detector arrays.
Inventors
- 👤 Llewellyn E. Wall
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 07:21
CPC Classifications
H; H10; H10W; H10W90/00; H03; H03M; H03M1/00; H03M1/12; H03M1/1205; H03M1/123; H03M1/50; H03M1/56; H03M1/58
Claims Analysis
Total Claims: 38
Claim 1
Independent Claim
234 words
In an electronic system containing a densely packaged three-dimensional structure which includes circuitry for obtaining and processing analog photodetector signals, such structure (a) being formed by a plurality of stacked circuitry-carrying layers, each having a plurality of parallel signal channels, and (b) having a two-dimensional array of photodetectors located on one surface of the structure, each in contact with a separate signal channel; analog to digital conversion circuitry comprising: a comparator in each channel having two analog signal inputs and one digital output, one of its input signals being received from the photodetector in the same channel; a storage register in each channel adapted to receive and store digital values; an analog voltage ramp generator which has its analog output connected to one input of each comparator in each of a plurality of channels; a counter which develops a changing digital value incrementally proportional to the simultaneous analog signal of the ramp generator, and which has its output connected to each storage register in each of a plurality of channels; each comparator being so arranged that its output changes from one digital value to the other when its two analog voltage inputs reach substantial equality; and the connection of each comparator to the same channel storage register being such that the storage register maintains the specific output counter value existing at the time of change of the output signal of the same channel comparator.
Claim 2
Dependent Claim
234 words
In an electronic system containing a densely packaged three-dimensional structure which includes circuitry for obtaining and processing analog photodetector signals, such structure (a) being formed by a plurality of stacked circuitry-carrying layers, each having a plurality of parallel signal channels, and (b) having a two-dimensional array of photodetectors located on one surface of the structure, each in contact with a separate signal channel; analog to digital conversion circuitry comprising: a comparator in each channel having two analog signal inputs and one digital output, one of its input signals being received from the photodetector in the same channel; a storage register in each channel adapted to receive and store digital values; an analog voltage ramp generator which has its analog output connected to one input of each comparator in each of a plurality of channels; a counter which develops a changing digital value incrementally proportional to the simultaneous analog signal of the ramp generator, and which has its output connected to each storage register in each of a plurality of channels; each comparator being so arranged that its output changes from one digital value to the other when its two analog voltage inputs reach substantial equality; and the connection of each comparator to the same channel storage register being such that the storage register maintains the specific output counter value existing at the time of change of the output signal of the same channel comparator.
Claim 3
Dependent Claim
19 words
The electronic system of claim 1 in which the analog voltage ramp generator is located outside the three-dimensional structure.
Claim 4
Dependent Claim
16 words
The electronic system of claim 1 in which the counter is located outside the three-dimensional structure.
Claim 5
Dependent Claim
16 words
The electronic system of claim 2 in which the counter is located outside the three-dimensional structure.
Claim 6
Dependent Claim
31 words
The electronic system of claim 1 in which; the three-dimensional structure is located in a low temperature environment; and the analog ramp and counter are located in a higher temperature environment.
Claim 7
Dependent Claim
28 words
The electronic system of claim 1 which also comprises: error compensating means for adjusting the comparator channel signal to compensate for the voltage offset error of the comparator.
Claim 8
Dependent Claim
17 words
The electronic system of claim 6 in which an error compensating means is included in each channel.
Claim 9
Dependent Claim
28 words
The electronic system of claim 4 which also comprises: error compensating means for adjusting the comparator channel signal to compensate for the voltage offset error of the comparator.
Claim 10
Dependent Claim
17 words
The electronic system of claim 8 in which an error compensating means is included in each channel.
Claim 11
Dependent Claim
31 words
The electronic system of claim 1 which also comprises: power reducing means for causing the duty cycle of the comparator to constitute only a small fraction of a full duty cycle.
Claim 12
Dependent Claim
17 words
The electronic system of claim 10 in which a power reducing means is included in each channel.
Claim 13
Dependent Claim
31 words
The electronic system of claim 4 which also comprises: power reducing means for causing the duty cycle of the comparator to constitute only a small fraction of a full duty cycle.
Claim 14
Dependent Claim
17 words
The electronic system of claim 12 in which a power reducing means is included in each channel.
Claim 15
Dependent Claim
31 words
The electronic system of claim 8 which also comprises: power reducing means for causing the duty cycle of the comparator to constitute only a small fraction of a full duty cycle.
Claim 16
Dependent Claim
22 words
The electronic system of claim 14 in which an error compensating means and a power reducing means are included in each channel.
Claim 17
Dependent Claim
184 words
An electronic system containing an array of analog signal generators, and adjacent parallel channels for such analog signals; a comparator in each channel having two analog signal inputs and one digital output, one of its input signals being received from the signal generator in the same channel; a storage register in each channel adapted to receive and store digital values; an analog voltage ramp generator which has its analog output connected to one input of each comparator in each of a plurality of channels; a counter which develops a changing digital value incrementally proportional to the simultaneous analog signal of the ramp generator, and which has its output connected to each storage register in each of a plurality of channels; each comparator being so arranged that its output changes from one digital value to the other when its two analog voltage inputs reach substantial equality; and the connection of each comparator to the same channel storage register being such that the storage register maintains the specific counter output value existing at the time of change of the output signal of the same channel comparator.
Claim 18
Dependent Claim
184 words
An electronic system containing an array of analog signal generators, and adjacent parallel channels for such analog signals; a comparator in each channel having two analog signal inputs and one digital output, one of its input signals being received from the signal generator in the same channel; a storage register in each channel adapted to receive and store digital values; an analog voltage ramp generator which has its analog output connected to one input of each comparator in each of a plurality of channels; a counter which develops a changing digital value incrementally proportional to the simultaneous analog signal of the ramp generator, and which has its output connected to each storage register in each of a plurality of channels; each comparator being so arranged that its output changes from one digital value to the other when its two analog voltage inputs reach substantial equality; and the connection of each comparator to the same channel storage register being such that the storage register maintains the specific counter output value existing at the time of change of the output signal of the same channel comparator.
Claim 19
Dependent Claim
28 words
The electronic system of claim 16 in which: the parallel channels are located on an integrated circuit chip; and the voltage ramp generator and counter are located elsewhere.
Claim 20
Dependent Claim
18 words
The electronic system of claim 17 in which the integrated circuit chip is located inside a cooled structure.
Claim 21
Dependent Claim
28 words
The electronic system of claim 16 which also comprises: error compensating means for adjusting the comparator channel signal to compensate for the voltage offset error of the comparator.
Claim 22
Dependent Claim
17 words
The electronic system of claim 19 in which an error compensating means is included in each channel.
Claim 23
Dependent Claim
31 words
The electronic system of claim 16 which also comprises: power reducing means for causing the duty cycle of the comparator to constitute only a small fraction of a full duty cycle.
Claim 24
Dependent Claim
17 words
The electronic system of claim 21 in which a power reducing means is included in each channel.
Claim 25
Dependent Claim
22 words
The electronic system of claim 16 in which an error compensating means and a power reducing means are included in each channel.
Claim 26
Dependent Claim
28 words
The electronic system of claim 17 which also comprises: error compensating means for adjusting the comparator channel signal to compensate for the voltage offset error of the comparator.
Claim 27
Dependent Claim
17 words
The electronic system of claim 24 in which an error compensating means is included in each channel.
Claim 28
Dependent Claim
31 words
The electronic system of claim 17 which also comprises: power reducing means for causing the duty cycle of the comparator to cinstitute only a small fraction of a full duty cycle.
Claim 29
Dependent Claim
17 words
The electronic system of claim 26 in which a power reducing means is included in each channel.
Claim 30
Dependent Claim
22 words
The electronic system of claim 17 in which an error compensating means and a power reducing means are included in each channel.
Claim 31
Dependent Claim
28 words
The electronic system of claim 18 which also comprises: error compensating means for adjusting the comparator channel signal to compensate for the voltage offset error of the comparator.
Claim 32
Dependent Claim
17 words
The electronic system of claim 29 in which an error compensating means is included in each channel.
Claim 33
Dependent Claim
31 words
The electronic system of claim 18 which also comprises: power reducing means for causing the duty cycle of the comparator to cinstitute only a small fraction of a full duty cycle.
Claim 34
Dependent Claim
17 words
The electronic system of claim 31 in which a power reducing means is included in each channel.
Claim 35
Dependent Claim
22 words
The electronic system of claim 18 in which an error compensating means and a power reducing means are included in each channel.
Claim 36
Dependent Claim
162 words
In an electronic system having an array of analog signal generators, integrated circuitry immediately adjacent to such signal generators, and additional non-adjacent processing circuitry, the method of enhancing the efficiency of the electronic system which comprises: including in the integrated circuitry a plurality of parallel channels, each receiving an incoming analog signal from a separate signal generator, and each containing a comparator and a storage register; inputting the analog signal in each channel to one input of the comparator in the same channel; inputting an analog ramp generator signal to the other input of each comparator; emitting an output signal from each comparator when its input signals reach equality; changing the digital value in each of the storage registers by inputting to them a changing value from a counter, such changing value being incrementally proportional to the analog ramp generator signal; and using the output signal of each comparator to capture and hold the digital value in the same channel storage register.
Claim 37
Dependent Claim
162 words
In an electronic system having an array of analog signal generators, integrated circuitry immediately adjacent to such signal generators, and additional non-adjacent processing circuitry, the method of enhancing the efficiency of the electronic system which comprises: including in the integrated circuitry a plurality of parallel channels, each receiving an incoming analog signal from a separate signal generator, and each containing a comparator and a storage register; inputting the analog signal in each channel to one input of the comparator in the same channel; inputting an analog ramp generator signal to the other input of each comparator; emitting an output signal from each comparator when its input signals reach equality; changing the digital value in each of the storage registers by inputting to them a changing value from a counter, such changing value being incrementally proportional to the analog ramp generator signal; and using the output signal of each comparator to capture and hold the digital value in the same channel storage register.
Claim 38
Dependent Claim
21 words
The method of claim 34 in which the analog ramp generator and the counter are included in the non-adjacent processing circuitry.
References Cited (Backward Citations)
US4704319A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-09-02 | 1995-03-04 | 1995-09-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-09-02 | 1999-03-04 | 1999-09-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-09-02 | 2003-03-04 | 2003-09-03 | $7700.00 | Window Closed / Lapsed |