Patent US5043781A successfully refreshed from Google Patents.
US5043781A
Expired / Lapsed
US
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Semiconductor device
Assignee: Fuji Electric Co Ltd
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Filing: 1990-08-01
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Granted: 1991-08-27
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Expires: 2010-08-01
Abstract
Abstract A MOS type semiconductor device including capacitors connected in series between the source electrode and the peripheral electrode. Alternately, a MOS type semiconductor device including constant voltage diodes connected in series between the source electrode and the peripheral electrode.
Inventors
- 👤 Masaharu Nishiura
- 👤 Tatsuhiko Fujihira
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 22:00
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/101; H10D84/141; H10D12/00; H10D12/411; H10D12/441; H10D30/00; H10D30/60; H10D30/64; H10D30/66; H10D30/665; H10D64/00; H10D64/111; H10D64/112; H10D84/80; H10D84/811
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
325 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type base layers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; a first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel formed in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a second conductivity type guard ring layer formed in said first conductivity type semiconductor substrate layer and disposed to surround said base layers; a source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said guard ring layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said guard ring layer; a plurality of bridging insulating film portions each formed over the portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layers; a plurality of connecting electrodes respectively formed over said bridging insulating film portions; and a capacitance associated with each portion of each bridging insulating film portion that overlaps one of said second conductivity type layers, said capacitances being connected in series between said source electrode and said peripheral electrode by said plurality of connecting electrodes.
Claim 2
Dependent Claim
325 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type base layers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; a first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel formed in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a second conductivity type guard ring layer formed in said first conductivity type semiconductor substrate layer and disposed to surround said base layers; a source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said guard ring layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said guard ring layer; a plurality of bridging insulating film portions each formed over the portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layers; a plurality of connecting electrodes respectively formed over said bridging insulating film portions; and a capacitance associated with each portion of each bridging insulating film portion that overlaps one of said second conductivity type layers, said capacitances being connected in series between said source electrode and said peripheral electrode by said plurality of connecting electrodes.
Claim 3
Dependent Claim
329 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type base layers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel formed in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a second conductivity type guard ring layer formed in said first conductivity type semiconductor substrate layer and disposed to surround said base layers; a source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said guard ring layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said guard ring layer; a plurality of bridging insulating film portions each formed over the portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layers; a plurality of connecting electrodes respectively formed over said bridging insulating film portions; and a plurality of first conductivity type layers formed in the plurality of second conductivity type layers to form a plurality of constant voltage diodes, said constant voltage diodes being connected in series between said source electrode and said peripheral electrode by said plurality of connecting electrodes.
Claim 4
Dependent Claim
329 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type base layers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel formed in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a second conductivity type guard ring layer formed in said first conductivity type semiconductor substrate layer and disposed to surround said base layers; a source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said guard ring layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said guard ring layer; a plurality of bridging insulating film portions each formed over the portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layers; a plurality of connecting electrodes respectively formed over said bridging insulating film portions; and a plurality of first conductivity type layers formed in the plurality of second conductivity type layers to form a plurality of constant voltage diodes, said constant voltage diodes being connected in series between said source electrode and said peripheral electrode by said plurality of connecting electrodes.
Claim 5
Dependent Claim
42 words
A MOS type semiconductor device according to claim 2 wherein a connecting point between a pair of said plurality of constant voltage diodes is connected to said gate electrode, and at least one of said constant voltage diodes is opposite in polarity.
Claim 6
Dependent Claim
330 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type base layers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; a first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel formed in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a second conductivity type guard ring layer formed in said first conductivity type semiconductor substrate layer and disposed to surround said base layers; a source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said guard ring layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said guard ring layer; a plurality of bridging insulating film portions each formed over a portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layers; a plurality of connecting electrodes respectively formed over said bridging insulating film portions; and a plurality of first conductivity type layers formed in the plurality of second conductivity type layers to form a plurality of constant voltage diodes, said constant voltage diodes being connected in series between said gate electrode and said peripheral electrode by said plurality of connecting electrodes.
Claim 7
Dependent Claim
330 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type base layers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; a first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel formed in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a second conductivity type guard ring layer formed in said first conductivity type semiconductor substrate layer and disposed to surround said base layers; a source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said guard ring layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said guard ring layer; a plurality of bridging insulating film portions each formed over a portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layers; a plurality of connecting electrodes respectively formed over said bridging insulating film portions; and a plurality of first conductivity type layers formed in the plurality of second conductivity type layers to form a plurality of constant voltage diodes, said constant voltage diodes being connected in series between said gate electrode and said peripheral electrode by said plurality of connecting electrodes.
Claim 8
Dependent Claim
22 words
A MOS type semiconductor device according to claim 4, wherein at least one of said constant voltage diodes is opposite in polarity.
Claim 9
Dependent Claim
435 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type baselayers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; a first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel formed in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a second conductivity type guard ring layer formed in said first conductivity type semiconductor substrate layer and disposed to surround said base layers; s source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said guard ring layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said guard ring layer; first conductivity type layers formed in said plurality of second conductivity type layers; a first plurality of bridging insulating film portions each formed over a portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layers; a second conductivity type region formed on a portion of each of said first plurality of bridging insulating film portions; a first conductivity type region formed on a remaining portion of each of said first plurality of bridging insulating film portions and in contact with said second conductivity type region; a a second plurality of bridging insulating film portions each formed over the junction of said second conductivity type region and said first conductivity type region formed one each of said first plurality of bridging insulating film portions; a plurality of connecting electrodes respectively formed to connect in series a plurality of constant voltage diodes formed by said first conductivity type layers formed in said plurality of second conductivity type layers, and said second conductivity type regions formed next to said first conductivity type regions on said first plurality of bridging insulating fill portions between said source electrode and said peripheral electrode.
Claim 10
Dependent Claim
435 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type baselayers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; a first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel formed in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a second conductivity type guard ring layer formed in said first conductivity type semiconductor substrate layer and disposed to surround said base layers; s source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said guard ring layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said guard ring layer; first conductivity type layers formed in said plurality of second conductivity type layers; a first plurality of bridging insulating film portions each formed over a portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layers; a second conductivity type region formed on a portion of each of said first plurality of bridging insulating film portions; a first conductivity type region formed on a remaining portion of each of said first plurality of bridging insulating film portions and in contact with said second conductivity type region; a a second plurality of bridging insulating film portions each formed over the junction of said second conductivity type region and said first conductivity type region formed one each of said first plurality of bridging insulating film portions; a plurality of connecting electrodes respectively formed to connect in series a plurality of constant voltage diodes formed by said first conductivity type layers formed in said plurality of second conductivity type layers, and said second conductivity type regions formed next to said first conductivity type regions on said first plurality of bridging insulating fill portions between said source electrode and said peripheral electrode.
Claim 11
Dependent Claim
42 words
A MOS type semiconductor device according to claim 6, wherein a connecting point between a pair of said plurality of constant voltage diodes is connected to said gate electrode, and at least one of said constant voltage diodes is opposite in polarity.
Claim 12
Dependent Claim
292 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type base layers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; a first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said peripheral electrode; a plurality of bridging insulating film portions each formed over the portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layers; a plurality of connecting electrodes respectively formed over said bridging insulating film portions; and a capacitance associated with each portion of each bridging insulating film portion that overlaps one of said second conductivity type layers, said capacitances being connected in series between said source electrode and said peripheral electrode by said plurality of connecting electrodes.
Claim 13
Dependent Claim
292 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type base layers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; a first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said peripheral electrode; a plurality of bridging insulating film portions each formed over the portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layers; a plurality of connecting electrodes respectively formed over said bridging insulating film portions; and a capacitance associated with each portion of each bridging insulating film portion that overlaps one of said second conductivity type layers, said capacitances being connected in series between said source electrode and said peripheral electrode by said plurality of connecting electrodes.
Claim 14
Dependent Claim
298 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type base layers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; a first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel formed in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said peripheral electrode; a plurality of bridging insulating film portions each formed over the portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layers; a plurality of connecting electrodes respectively formed over said bridging insulating film portions; and a plurality of first conductivity type layers formed in the plurality of second conductivity type layers to form a plurality of constant voltage diodes, said constant voltage diodes being connected in series between said source electrode and said peripheral electrode by said plurality of connecting electrodes.
Claim 15
Dependent Claim
298 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type base layers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; a first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel formed in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said peripheral electrode; a plurality of bridging insulating film portions each formed over the portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layers; a plurality of connecting electrodes respectively formed over said bridging insulating film portions; and a plurality of first conductivity type layers formed in the plurality of second conductivity type layers to form a plurality of constant voltage diodes, said constant voltage diodes being connected in series between said source electrode and said peripheral electrode by said plurality of connecting electrodes.
Claim 16
Dependent Claim
42 words
A MOS type semiconductor device according to claim 9 wherein a connecting point between a pair of said plurality of constant voltage diodes is connected to said gate electrode, sand at least one of said constant voltage diodes is opposite in polarity.
Claim 17
Dependent Claim
298 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type base layers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; a first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel formed in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said peripheral electrode; a plurality of bridging insulating film portions each formed over a portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layer; a plurality of connecting electrodes respectively formed over said bridging insulating film portions; and a plurality of first conductivity type layers formed in the plurality of second conductivity type layers to form a plurality of constant voltage diodes, said constant voltage diodes being connected in series between said gate electrode and said peripheral electrode by said plurality of connecting electrodes.
Claim 18
Dependent Claim
298 words
A MOS type semiconductor device, comprising: a semiconductor substrate including a first conductivity type semiconductor layer; a plurality of second conductivity type base layers selectively formed in a surface portion of the first conductivity type semiconductor substrate layer; a first conductivity type source layer selectively formed in a surface portion of said base layers; a gate insulating film formed over at least a portion of each said base layer; a gate electrode formed on the gate insulating film; a channel formed in a portion of said base layer beneath said gate electrode and between said source layer and said first conductivity type semiconductor substrate layer; a source electrode formed on the surface of said first conductivity type semiconductor substrate layer and in contact with said base layer and said source layer; a peripheral electrode formed on the surface of said first conductivity type semiconductor substrate layer; a drain electrode formed on an opposite surface of said semiconductor substrate to have a potential substantially equal to that of said peripheral electrode; a plurality of second conductivity type layers formed in the surface of said first conductivity type semiconductor substrate layer between said source layer and said peripheral electrode; a plurality of bridging insulating film portions each formed over a portion of said first conductivity type semiconductor substrate layer between adjacent ones of said second conductivity type layers and overlapping at least portions of said adjacent second conductivity type layer; a plurality of connecting electrodes respectively formed over said bridging insulating film portions; and a plurality of first conductivity type layers formed in the plurality of second conductivity type layers to form a plurality of constant voltage diodes, said constant voltage diodes being connected in series between said gate electrode and said peripheral electrode by said plurality of connecting electrodes.
Claim 19
Dependent Claim
22 words
A MOS type semiconductor device according to claim 11, wherein at least one of said constant voltage diodes is opposite in polarity.
Claim 20
Independent Claim
201 words
A method for forming a MOS type semiconductor device, comprising the steps of: selectively diffusing a second conductivity type impurity into a surface of a first conductivity type silicon substrate to form second conductivity type layers; forming a first oxide film on the surface of said silicon substrate; depositing a polycrystalline silicon film on said first oxide film; patterning said polycrystalline silicon film to form a gate electrode and a plurality of connecting electrodes; patterning said first oxide film using said gate electrode and connecting electrodes as a mask; forming a first conductivity type source layer in a selected one of said second conductivity type layers; forming a second oxide layer on the surface of the silicon substrate to cover said gate electrode and said connecting electrodes; forming a source electrode in contact with a first one of said second type conductivity type layers; forming a peripheral electrode in contact with a peripheral one of said second conductivity type layers that is disposed to surround the other second conductivity type layers; forming a third oxide layer to cover said second oxide layers and exposed portions of said second conductivity type layers; and forming a signal line over said third oxide layer.
Claim 21
Independent Claim
201 words
A method for forming a MOS type semiconductor device, comprising the steps of: selectively diffusing a second conductivity type impurity into a surface of a first conductivity type silicon substrate to form second conductivity type layers; forming a first oxide film on the surface of said silicon substrate; depositing a polycrystalline silicon film on said first oxide film; patterning said polycrystalline silicon film to form a gate electrode and a plurality of connecting electrodes; patterning said first oxide film using said gate electrode and connecting electrodes as a mask; forming a first conductivity type source layer in a selected one of said second conductivity type layers; forming a second oxide layer on the surface of the silicon substrate to cover said gate electrode and said connecting electrodes; forming a source electrode in contact with a first one of said second type conductivity type layers; forming a peripheral electrode in contact with a peripheral one of said second conductivity type layers that is disposed to surround the other second conductivity type layers; forming a third oxide layer to cover said second oxide layers and exposed portions of said second conductivity type layers; and forming a signal line over said third oxide layer.
References Cited (Backward Citations)
US4929989A
Cited
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1994-08-26 | 1995-02-25 | 1995-08-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-08-26 | 1999-02-25 | 1999-08-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-08-26 | 2003-02-25 | 2003-08-27 | $7700.00 | Window Closed / Lapsed |