Patent US5042009A successfully refreshed from Google Patents.
US5042009A
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Method for programming a floating gate memory device
Assignee: United Module Corp
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Filing: 1988-12-09
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Granted: 1991-08-20
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Expires: 2008-12-09
Abstract
Abstract A method of programming a floating gate transistor permits the use of a charge pump to provide drain programming current. The programming drain current is typically held below about 1 μA. This programming drain current can be provided by a conventional charge pump. In the first embodiment, the drain current can be limited by connecting a resistor between the source and ground. In a second embodiment, the drain current is limited by limiting the transistor control gate voltage. In a third embodiment, a charge pump is coupled to the drain while the control gate is repetitively pulsed. Each time the control gate is pulsed, the transistor turns on, and although the drain is initially discharged through the transistor, some hot electrons are accelerated onto the floating gate, and eventually the floating gate is programmed. In these embodiments the erase gate voltage may be raised to enhance programming efficiency.
Inventors
- 👤 Reza Kazerounian
- 👤 Boaz Eitan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 20:38
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/10; G11C16/04; G11C16/0408; G11C16/0425; G11C16/30
Claims Analysis
Total Claims: 38
Claim 1
Independent Claim
119 words
A method for programming a floating gate transistor, said floating gate transistor comprising a source, a drain spaced apart from said source, said source and drain being of a first conductivity type and formed in a semiconductor region of a second conductivity type, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate, said method comprising the steps of: applying a programming voltage to said drain and control gate sufficient to cause hot electron injection programming of said transistor; and ensuring that the programming drain current for said transistor is less than a predetermined value.
Claim 2
Independent Claim
119 words
A method for programming a floating gate transistor, said floating gate transistor comprising a source, a drain spaced apart from said source, said source and drain being of a first conductivity type and formed in a semiconductor region of a second conductivity type, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate, said method comprising the steps of: applying a programming voltage to said drain and control gate sufficient to cause hot electron injection programming of said transistor; and ensuring that the programming drain current for said transistor is less than a predetermined value.
Claim 3
Dependent Claim
17 words
Method of claim 1 wherein said predetermined value is less than or equal to about 150 μA.
Claim 4
Dependent Claim
17 words
Method of claim 1 wherein said predetermined value is less than or equal to about 10 μA.
Claim 5
Dependent Claim
38 words
Method of claim 1 wherein said programming drain voltage is provided by a charge pump and said programming drain current is held to a value sufficiently low so that said charge pump can provide said programming drain current.
Claim 6
Independent Claim
158 words
A method for programming a floating gate transistor, said floating gate transistor comprising a source, a drain spaced apart from said source, said source and drain being of a first conductivity type and formed in a semiconductor region of a second conductivity type, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate, said method comprising the steps of: applying a programming voltage to said drain; and applying to said control gate a voltage which rises from a first value to a second value such that during the time said voltage at said control gate is rising, electrons are being injected into said floating gate so that the threshold voltage of said transistor increases at a rate which ensures that said transistor does not draw a drain current over a predetermined value during programming.
Claim 7
Independent Claim
158 words
A method for programming a floating gate transistor, said floating gate transistor comprising a source, a drain spaced apart from said source, said source and drain being of a first conductivity type and formed in a semiconductor region of a second conductivity type, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate, said method comprising the steps of: applying a programming voltage to said drain; and applying to said control gate a voltage which rises from a first value to a second value such that during the time said voltage at said control gate is rising, electrons are being injected into said floating gate so that the threshold voltage of said transistor increases at a rate which ensures that said transistor does not draw a drain current over a predetermined value during programming.
Claim 8
Dependent Claim
27 words
Method of claim 5 wherein the voltage applied to said control gate rises from said first value to said second value over a 0.1 ms time period.
Claim 9
Dependent Claim
29 words
Method of claim 1 wherein said step of ensuring comprises the step of applying a voltage to said control gate to keep the drain current below said predetermined value.
Claim 10
Dependent Claim
31 words
Method of claim 7 wherein said transistor comprises an erase gate capacitively coupled to said floating gate, said method further comprising the step of raising the voltage at said erase gate.
Claim 11
Independent Claim
128 words
A method for programming a floating gate transistor, said floating gate transistor comprising a source, a drain spaced apart from said source, said source and drain being of a first conductivity type and formed in a semiconductor region of a second conductivity type, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate, said method comprising the steps of: applying a programming voltage to said drain and control gate; ensuring that the programming drain current is less than a predetermined value, wherein said step of ensuring comprises the step of providing an electrical resistance between said source and ground, said semiconductor region being grounded.
Claim 12
Independent Claim
128 words
A method for programming a floating gate transistor, said floating gate transistor comprising a source, a drain spaced apart from said source, said source and drain being of a first conductivity type and formed in a semiconductor region of a second conductivity type, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate, said method comprising the steps of: applying a programming voltage to said drain and control gate; ensuring that the programming drain current is less than a predetermined value, wherein said step of ensuring comprises the step of providing an electrical resistance between said source and ground, said semiconductor region being grounded.
Claim 13
Dependent Claim
31 words
Method of claim 9 wherein said transistor comprises an erase gate capacitively coupled to said floating gate, said method further comprising the step of raising the voltage at said erase gate.
Claim 14
Dependent Claim
18 words
Method of claim 10 wherein the voltage at said erase gate is greater than 5 volts during programming.
Claim 15
Dependent Claim
18 words
Method of claim 10 wherein the voltage at said erase gate is less than 20 volts during programming.
Claim 16
Dependent Claim
16 words
Method of claim 9 wherein said transistor comprises an erase gate which is grounded during programming.
Claim 17
Independent Claim
81 words
A method for programming a floating gate transistor, said transistor comprising a source, a drain, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate, said method comprising the steps of: coupling a programming voltage generator to said drain; and repetitively applying pulses to said control gate to thereby cause hot electron injection programming of said transistor.
Claim 18
Independent Claim
81 words
A method for programming a floating gate transistor, said transistor comprising a source, a drain, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate, said method comprising the steps of: coupling a programming voltage generator to said drain; and repetitively applying pulses to said control gate to thereby cause hot electron injection programming of said transistor.
Claim 19
Dependent Claim
13 words
Method of claim 14 wherein said programming voltage generator is a charge pump.
Claim 20
Dependent Claim
31 words
Method of claim 14 wherein said transistor comprises an erase gate capacitively coupled to said floating gate, said method further comprising the step of raising the voltage at said erase gate.
Claim 21
Dependent Claim
16 words
Method of claim 14 wherein said transistor comprises an erase gate which is grounded during programming.
Claim 22
Independent Claim
126 words
A method for programming a floating gate transistor, said transistor comprising a source, a drain, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate, said method comprising the steps of: coupling a programming voltage generator to said drain; and repetitively applying pulses to said control gate, wherein said programming voltage generator is incapable of generating an output current which said transistor would normally conduct if (1) said floating gate were unprogrammed, (2) said programming drain voltage was applied to said drain, and (3) a programming control gate voltage equal to the amplitude of said pulses was applied to said control gate.
Claim 23
Independent Claim
126 words
A method for programming a floating gate transistor, said transistor comprising a source, a drain, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate, said method comprising the steps of: coupling a programming voltage generator to said drain; and repetitively applying pulses to said control gate, wherein said programming voltage generator is incapable of generating an output current which said transistor would normally conduct if (1) said floating gate were unprogrammed, (2) said programming drain voltage was applied to said drain, and (3) a programming control gate voltage equal to the amplitude of said pulses was applied to said control gate.
Claim 24
Dependent Claim
108 words
Structure comprising: a floating transistor including a source, a drain spaced apart from said source, said source and drain being of a first conductivity type and formed in a semiconductor region of a second conductivity type, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate; and means for applying a programming voltage to said drain and control gate to thereby program said transistor by hot electron injection and ensuring that the programming drain current of said transistor is less than a predetermined value.
Claim 25
Dependent Claim
108 words
Structure comprising: a floating transistor including a source, a drain spaced apart from said source, said source and drain being of a first conductivity type and formed in a semiconductor region of a second conductivity type, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate; and means for applying a programming voltage to said drain and control gate to thereby program said transistor by hot electron injection and ensuring that the programming drain current of said transistor is less than a predetermined value.
Claim 26
Dependent Claim
17 words
Structure of claim 19 wherein said predetermined value is less than or equal to about 150 μA.
Claim 27
Dependent Claim
168 words
Structure comprising: a floating gate transistor including a source, a drain spaced apart from said source, said source and drain being of a first conductivity type and formed in a semiconductor region of a second conductivity type, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and control gate extending over at least a portion of said floating gate; and means for applying a programming voltage to said drain and control gate and ensuring that the programming drain current is less than a predetermined value, wherein said means for applying applies to said control gate a voltage which rises from a first value to a second value such that during the time said voltage at said control gate is rising, electrons are being injected into said floating gate so that the threshold voltage of said transistor increases at a rate which ensures that said transistor does not draw a drain current over said predetermined value during programming.
Claim 28
Dependent Claim
168 words
Structure comprising: a floating gate transistor including a source, a drain spaced apart from said source, said source and drain being of a first conductivity type and formed in a semiconductor region of a second conductivity type, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and control gate extending over at least a portion of said floating gate; and means for applying a programming voltage to said drain and control gate and ensuring that the programming drain current is less than a predetermined value, wherein said means for applying applies to said control gate a voltage which rises from a first value to a second value such that during the time said voltage at said control gate is rising, electrons are being injected into said floating gate so that the threshold voltage of said transistor increases at a rate which ensures that said transistor does not draw a drain current over said predetermined value during programming.
Claim 29
Dependent Claim
32 words
Structure of claim 21 wherein said means for applying causes the voltage at said control gate to rise from said first value to said second value over a 0.1 ms time period.
Claim 30
Dependent Claim
31 words
Structure of claim 19 wherein an electrical resistance is provided between said source and ground to prevent said programming drain current from exceeding said predetermined value, said semiconductor region being grounded.
Claim 31
Dependent Claim
32 words
Structure of claim 23 wherein said transistor comprises an erase gate capacitively coupled to said floating gate, and said means for applying also raises the voltage at said erase gate during programming.
Claim 32
Dependent Claim
66 words
Structure comprising: a floating gate transistor including a source, a drain, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate; and means for repetitively applying pulses to said control gate to thereby program said floating gate transistor by hot electron injection.
Claim 33
Dependent Claim
66 words
Structure comprising: a floating gate transistor including a source, a drain, a channel extending between said source and drain, a floating gate extending over at least a portion of said channel, and a control gate extending over at least a portion of said floating gate; and means for repetitively applying pulses to said control gate to thereby program said floating gate transistor by hot electron injection.
Claim 34
Dependent Claim
32 words
Structure of claim 25 wherein said transistor includes an erase gate capacitively coupled to said floating gate, said structure further comprising means for raising the voltage at said erase gate during programming.
Claim 35
Dependent Claim
38 words
Method of claim 1 wherein said step of ensuring comprises the step of coupling the source of said floating gate transistor to an additional transistor, said additional transistor limiting the current of said floating gate transistor during programming.
Claim 36
Dependent Claim
24 words
Method of claim 1 wherein said step of ensuring comprises the step of raising the source voltage of said floating gate transistor during programming.
Claim 37
Dependent Claim
16 words
Structure of claim 19 further comprising means for increasing the voltage at said source during programming.
Claim 38
Dependent Claim
30 words
Structure of claim 19 further comprising an additional transistor coupled to the source of said floating gate transistor, said additional transistor limiting the programming current of said floating gate transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-08-19 | 1995-02-18 | 1995-08-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-08-19 | 1999-02-18 | 1999-08-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-08-19 | 2003-02-18 | 2003-08-20 | $7700.00 | Window Closed / Lapsed |