Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
158 words
A demodulation circuit for use in a global positioning system (GPS) receiver, comprising: a reference oscillator generating a frequency of nominally F or an integral multiple thereof, where F=5.115 MHz; first, second and third demodulation stages for demodulating an L1 GPS signal in an L1 signal channel; first, second and third demodulation stages for demodulating an L2 GPS signal in an L2 signal channel; a frequency synthesizer coupled to the reference oscillator, for generating a first local oscillator frequency for application to the first demodulation stages of the L1 and L2 signal channels, and for generating a second local oscillator frequency for application to the second demodulation stages of the L1 and L2 signal channels; and means for applying the reference oscillator signal to the third demodulation stage of the L1 and L2 signal channels in such a manner that each signal channel after the third stage of demodulation is still modulated at the same nominal intermediate frequency.
Claim 2
Dependent Claim
158 words
A demodulation circuit for use in a global positioning system (GPS) receiver, comprising: a reference oscillator generating a frequency of nominally F or an integral multiple thereof, where F=5.115 MHz; first, second and third demodulation stages for demodulating an L1 GPS signal in an L1 signal channel; first, second and third demodulation stages for demodulating an L2 GPS signal in an L2 signal channel; a frequency synthesizer coupled to the reference oscillator, for generating a first local oscillator frequency for application to the first demodulation stages of the L1 and L2 signal channels, and for generating a second local oscillator frequency for application to the second demodulation stages of the L1 and L2 signal channels; and means for applying the reference oscillator signal to the third demodulation stage of the L1 and L2 signal channels in such a manner that each signal channel after the third stage of demodulation is still modulated at the same nominal intermediate frequency.
Claim 3
Dependent Claim
35 words
A demodulation circuit as defined in claim 1, wherein: the third demodulation stage also effects digital sampling at a rate that is a binary multiple of the intermediate frequency after the third stage of demodulation.
Claim 4
Dependent Claim
87 words
A demodulation circuit as defined in claim 2, wherein: the local oscillator frequency for the first demodulation stages is nominally 270F; the local oscillator frequency for the second demodulation stages is nominally 33.75F; the effective local oscillator frequency for the third demodulation stages is nominally 4F; the digital sampling rate in the third stages is nominally 2F and is derived directly from the reference oscillator; and the intermediate frequency after the third stages of demodulation is nominally 0.25F in both the L1 and the L2 signal channels.
Claim 5
Dependent Claim
119 words
A demodulation circuit as defined in claim 3, wherein the frequency synthesizer includes: a voltage-controlled oscillator (VCO) having a nominal output frequency of 270F for application to the first demodulation stages; a first frequency divider connected to the VCO to provide a nominal frequency of 33.75F for application to the second demodulation stages; a second frequency divider connected to the VCO to provide a nominal frequency of 0.25F; a third frequency divider connected to the reference oscillator to provide a nominal frequency of 0.25F; and a phase detector connected to receive the signals from the second and third frequency dividers and connected to provide a control signal to the VCO to lock its operation to the reference oscillator frequency.
Claim 6
Dependent Claim
31 words
A demodulation circuit as defined in claim 4, and further comprising: a baseband demodulation stage for converting the signals output from the third demodulation stages from the intermediate frequency to baseband.