US3887794A
Expired / Lapsed
US
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Doppler shift computer
Assignee: Electrac Inc
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Filing: 1973-10-29
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Granted: 1975-06-03
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Expires: 1993-10-29
Abstract
Abstract A doppler shift computer is disclosed wherein are inputted two separate input carrier frequencies, a high and low carrier frequency (RF) that have been transmitted from a moving transmitter. The receiver frequencies are separated by a signal divider and then the information frequencies are separated from the respective carrier frequencies. Due to the relative motion between the transmitter and the computer, the respective received carrier frequencies have shifted from the respective transmitted frequencies due to doppler effect, and also due to variations in the atmosphere resulting in undesirable frequency error. Therefore, each received carrier frequency includes these frequency components, the transmitted frequency plus or minus the doppler frequency, plus or minus the error frequency. The carrier frequency is known but the doppler and error frequencies are both unknown. In the simplified embodiment, to separate the doppler or the error frequencies therefrom, the received higher carrier frequency is mixed within a first mixer with the output frequency of an oscillator containing a reference frequency plus the higher carrier frequency so that the reference frequency is outputted therefrom. This output frequency from the first mixer is maintained equal to the reference by a phase comparative circuit whose voltage output controls the frequency outputted by a first voltage controlled oscillator at some fixed multiple of the reference frequency plus the higher carrier frequency. A first divider circuit divides the output frequency of the voltage controlled oscillator whereby its output is the reference frequency plus the higher carrier frequency that is inputted to the first mixer. The received lower carrier frequency in the other channel is mixed in a second mixer, also with the output frequency of the voltage controlled oscillator that has been divided by a second divider circuit by a divisor that makes the ratio of the divisors of both divider circuits equal to the ratio of the signal frequencies. This frequency outputted by the second mixer is maintained equal to a fixed fraction of the frequency outputted by a second voltage controlled oscillator. The frequency outputted by the second voltage controlled oscillator is mixed in a controlled manner with one of the frequencies controlling the first voltage controlled oscillator, thus removing the error component therefrom.
Inventors
- 👤 Louis Katz
- 👤 Lawrence Wells
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 03:05
CPC Classifications
G; G01; G01S; G01S11/00; G01S11/02; G01S11/10
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
505 words
A computer for calculating the amount the frequency in first and second RF channels has shifted while being transmitted from a first point to a second point wherein each received frequency at the second point is the sum of the transmitted frequency plus the doppler shift frequency plus the error shift frequency and the two transmitted frequencies are at a fixed ratio to each other, said computer comprising: a first and a second adder for adding at least two frequencies inputted therein and outputting the sum, first means for coupling the received frequency of said first channel to said first adder, second means including a first voltage controlled oscillator and a first divider circuit for producing a first frequency that includes a reference frequency plus at least the transmitted and doppler frequencies of said one channel and for coupling said first frequency to said first adder so that at least the reference frequency is outputted therefrom, thrid means of producing a second frequency that is substantially equal to the outputted frequency from said first adder fourth means for comparing said second frequency and the outputted frequency from said first adder to produce a first voltage that is related to the phase difference between the frequencies, said first voltage controlled oscillator being responsive to said first voltage to control its output frequency to maintain said second frequency and said first adder outputted frequency equal to each other and its output frequency being a multiple of said first frequency, said first divider circuit being disposed between said first voltage controlled oscillator and said first adder, fifth means for coupling the frequency of the second channel to said second adder, a second divider for dividing the output frequency of said first voltage controlled oscillator and producing a third frequency wherein the ratio of said first frequency to said third frequency is the same as the ratio of said transmitted frequencies and for coupling said third frequency to said second adder, said second adder outputting a fourth frequency that includes the reference frequency multiplied by said ratio and a fraction of the value of the error frequency of said second channel, sixth means including a second voltage controlled oscillator and a third divider having its input coupled to the output of said second oscillator for producing a fifth frequency that is substantially equal to said fourth frequency, seventh means for comparing said fourth and fifth frequencies to produce a second voltage that is related to the phase difference of the frequencies and is coupled to the input of said second oscillator, said second voltage controlled oscillator being responsive to said second voltage to control its output frequency to maintain said fifth frequency equal to said fourth frequency and the output frequency of said second oscillator being a fixed multiple of said fourth frequency, and eighth means for coupling the output frequency of said second oscillator to the output frequency of said first oscillator so that the error frequency shift is removed from the outputted frequency of said first divider.
Claim 2
Dependent Claim
505 words
A computer for calculating the amount the frequency in first and second RF channels has shifted while being transmitted from a first point to a second point wherein each received frequency at the second point is the sum of the transmitted frequency plus the doppler shift frequency plus the error shift frequency and the two transmitted frequencies are at a fixed ratio to each other, said computer comprising: a first and a second adder for adding at least two frequencies inputted therein and outputting the sum, first means for coupling the received frequency of said first channel to said first adder, second means including a first voltage controlled oscillator and a first divider circuit for producing a first frequency that includes a reference frequency plus at least the transmitted and doppler frequencies of said one channel and for coupling said first frequency to said first adder so that at least the reference frequency is outputted therefrom, thrid means of producing a second frequency that is substantially equal to the outputted frequency from said first adder fourth means for comparing said second frequency and the outputted frequency from said first adder to produce a first voltage that is related to the phase difference between the frequencies, said first voltage controlled oscillator being responsive to said first voltage to control its output frequency to maintain said second frequency and said first adder outputted frequency equal to each other and its output frequency being a multiple of said first frequency, said first divider circuit being disposed between said first voltage controlled oscillator and said first adder, fifth means for coupling the frequency of the second channel to said second adder, a second divider for dividing the output frequency of said first voltage controlled oscillator and producing a third frequency wherein the ratio of said first frequency to said third frequency is the same as the ratio of said transmitted frequencies and for coupling said third frequency to said second adder, said second adder outputting a fourth frequency that includes the reference frequency multiplied by said ratio and a fraction of the value of the error frequency of said second channel, sixth means including a second voltage controlled oscillator and a third divider having its input coupled to the output of said second oscillator for producing a fifth frequency that is substantially equal to said fourth frequency, seventh means for comparing said fourth and fifth frequencies to produce a second voltage that is related to the phase difference of the frequencies and is coupled to the input of said second oscillator, said second voltage controlled oscillator being responsive to said second voltage to control its output frequency to maintain said fifth frequency equal to said fourth frequency and the output frequency of said second oscillator being a fixed multiple of said fourth frequency, and eighth means for coupling the output frequency of said second oscillator to the output frequency of said first oscillator so that the error frequency shift is removed from the outputted frequency of said first divider.
Claim 3
Dependent Claim
505 words
A computer for calculating the amount the frequency in first and second RF channels has shifted while being transmitted from a first point to a second point wherein each received frequency at the second point is the sum of the transmitted frequency plus the doppler shift frequency plus the error shift frequency and the two transmitted frequencies are at a fixed ratio to each other, said computer comprising: a first and a second adder for adding at least two frequencies inputted therein and outputting the sum, first means for coupling the received frequency of said first channel to said first adder, second means including a first voltage controlled oscillator and a first divider circuit for producing a first frequency that includes a reference frequency plus at least the transmitted and doppler frequencies of said one channel and for coupling said first frequency to said first adder so that at least the reference frequency is outputted therefrom, thrid means of producing a second frequency that is substantially equal to the outputted frequency from said first adder fourth means for comparing said second frequency and the outputted frequency from said first adder to produce a first voltage that is related to the phase difference between the frequencies, said first voltage controlled oscillator being responsive to said first voltage to control its output frequency to maintain said second frequency and said first adder outputted frequency equal to each other and its output frequency being a multiple of said first frequency, said first divider circuit being disposed between said first voltage controlled oscillator and said first adder, fifth means for coupling the frequency of the second channel to said second adder, a second divider for dividing the output frequency of said first voltage controlled oscillator and producing a third frequency wherein the ratio of said first frequency to said third frequency is the same as the ratio of said transmitted frequencies and for coupling said third frequency to said second adder, said second adder outputting a fourth frequency that includes the reference frequency multiplied by said ratio and a fraction of the value of the error frequency of said second channel, sixth means including a second voltage controlled oscillator and a third divider having its input coupled to the output of said second oscillator for producing a fifth frequency that is substantially equal to said fourth frequency, seventh means for comparing said fourth and fifth frequencies to produce a second voltage that is related to the phase difference of the frequencies and is coupled to the input of said second oscillator, said second voltage controlled oscillator being responsive to said second voltage to control its output frequency to maintain said fifth frequency equal to said fourth frequency and the output frequency of said second oscillator being a fixed multiple of said fourth frequency, and eighth means for coupling the output frequency of said second oscillator to the output frequency of said first oscillator so that the error frequency shift is removed from the outputted frequency of said first divider.
Claim 4
Dependent Claim
505 words
A computer for calculating the amount the frequency in first and second RF channels has shifted while being transmitted from a first point to a second point wherein each received frequency at the second point is the sum of the transmitted frequency plus the doppler shift frequency plus the error shift frequency and the two transmitted frequencies are at a fixed ratio to each other, said computer comprising: a first and a second adder for adding at least two frequencies inputted therein and outputting the sum, first means for coupling the received frequency of said first channel to said first adder, second means including a first voltage controlled oscillator and a first divider circuit for producing a first frequency that includes a reference frequency plus at least the transmitted and doppler frequencies of said one channel and for coupling said first frequency to said first adder so that at least the reference frequency is outputted therefrom, thrid means of producing a second frequency that is substantially equal to the outputted frequency from said first adder fourth means for comparing said second frequency and the outputted frequency from said first adder to produce a first voltage that is related to the phase difference between the frequencies, said first voltage controlled oscillator being responsive to said first voltage to control its output frequency to maintain said second frequency and said first adder outputted frequency equal to each other and its output frequency being a multiple of said first frequency, said first divider circuit being disposed between said first voltage controlled oscillator and said first adder, fifth means for coupling the frequency of the second channel to said second adder, a second divider for dividing the output frequency of said first voltage controlled oscillator and producing a third frequency wherein the ratio of said first frequency to said third frequency is the same as the ratio of said transmitted frequencies and for coupling said third frequency to said second adder, said second adder outputting a fourth frequency that includes the reference frequency multiplied by said ratio and a fraction of the value of the error frequency of said second channel, sixth means including a second voltage controlled oscillator and a third divider having its input coupled to the output of said second oscillator for producing a fifth frequency that is substantially equal to said fourth frequency, seventh means for comparing said fourth and fifth frequencies to produce a second voltage that is related to the phase difference of the frequencies and is coupled to the input of said second oscillator, said second voltage controlled oscillator being responsive to said second voltage to control its output frequency to maintain said fifth frequency equal to said fourth frequency and the output frequency of said second oscillator being a fixed multiple of said fourth frequency, and eighth means for coupling the output frequency of said second oscillator to the output frequency of said first oscillator so that the error frequency shift is removed from the outputted frequency of said first divider.
Claim 5
Dependent Claim
286 words
The computer of claim 1 wherein: the transmitted frequency on said second channel is lower than the transmiTted frequency on said first channel, said fourth frequency is further limited to having said fraction error frequency of said second channel equal to the square of said ratio minus one, said third divider circuit divides the output of said second oscillator by a first integer so that the output frequency of said second oscillator is equal to a second integer multiple of said reference frequency minus a third integer multiple of the error frequency of said first channel, said third means includes a fixed oscillator that produces an output frequency that is a fourth integer multiple of said reference frequency, said eighth means includes a third adder to which the output frequency of said fixed oscillator and the output frequency of said second oscillator are coupled for subtracting the second mentioned output frequency from said first mentioned, and said first, second, third and fourth integers are chosen so that the output frequency of said third adder is equal to said third integer multiple of both the reference frequency plus the error frequency of said first channel, said eighth means also includes a fourth divider circuit for dividing the output frequency of said third adder by said third integer, said first divider is limited so that its output frequency is substantially equal to the received frequency of said first channel plus the reference frequency, said eighth means includes a fourth adder to which is coupled the output frequency of said first divider and the output frequency of said fourth divider so that its output frequency is equal to the transmitted frequency plus the doppler frequency of said first channel.
Claim 6
Dependent Claim
36 words
The computer of claim 2 wherein said third means also includes a fifth divider circuit that divides the output frequency of said fixed oscillator by said fourth integer and couples the result to said fourth means.
Claim 7
Dependent Claim
97 words
The computer of claim 3 wherein: the ratio of the frequency of said first channel to the frequency of the second channel is 8 to 3; said first divider circuit divides the output frequency of said first oscillator by 3; said second divider circuit divides the output frequency of said first oscillator by 8; said third divider circuit divides the output frequency of said second oscillator by 24; said fourth divider circuit divides the output frequency of said third adder by 55; said fixed oscillator produces a frequency that is 64 times larger than said reference frequency.
Claim 8
Dependent Claim
232 words
The computer of claim 1 wherein: the transmitted frequency on said second channel is lower than the transmitted frequency on said first channel, said first frequency outputted by said first divider circuit consists of the sum of the reference, the transmitted and the doppler frequencies of said first channel; said output frequency of said first adder consists of the sum of the reference and error frequencies of said first channel; said fourth frequency consists of the sum of the reference times said ratio and the error of said first channel times the inverse of the ratio; said second oscillator producing a frequency that is the sum of a first integer times the reference and of a second integer times the error frequency of said first channel; said third and eighth means in combination include: a fixed oscillator means for producing a frequency that is a third integer times the reference frequency and said third integer is equal to the difference between said second and first integers; a third adder to which are coupled the output frequency of said second oscillator and the third integer times the reference frequency to produce a sixth frequency that is equal to the second integer times the sum of both the reference and the error frequency of said first channel, a fourth divider for dividing said sixth frequency by said second integer to produce said second frequency.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-06-02 | 1978-12-02 | 1979-06-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-06-02 | 1982-12-02 | 1983-06-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-06-02 | 1986-12-02 | 1987-06-03 | $7700.00 | Window Closed / Lapsed |