Patent US5038210A successfully refreshed from Google Patents.
US5038210A
Expired / Lapsed
US
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Test pattern signal generator for producing zone plate and other test patterns
Assignee: Philips GmbH
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Filing: 1991-01-09
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Granted: 1991-08-06
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Expires: 2011-01-09
Abstract
Abstract A test pattern generator for digital television signals produces a zone plate pattern on an orthogonal pixel raster generated by pixel and line counters. The counter outputs are supplied to respective ROMs each storing a parabolic function. Their outputs are added to define zone plate circles on the basis of the circle equation x 2 =y 2 =r 2 . Circular patterns of evenly spaced color bars are produced by interposing a square root extracting ROM ahead of another ROM which converts the phase values into amplitude values. The optional interposition of a square root function after the addition and before the conversion into amplitude values provides a different circular test pattern. It can be readily modified in various ways under control of a microprocessor or EPROM.
Inventors
- 👤 Winfried Deckelmann
- 👤 Hans-Peter Richter
- 👤 Stefan Ott
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 11:35
CPC Classifications
H; H04; H04N; H04N17/00
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
200 words
A test pattern generator for testing digital television signals which is capable of providing a circular zone plate pattern signal as well as other test pattern signals, comprising horizontal pixel rate and vertical line rate counters (1, 2) for generation of an orthogonal pixel raster, first and second ROMs (3, 4), each having an output and respectively connected to and addressable by said counters for respectively generating horizontal and vertical phase values, an addition stage (5) connected to the respective outputs of said ROMs for combining said phase values and a third ROM (9), connected for receiving phase values from said addition stage and having an output, for converting said combined phase values into amplitude values and further comprising: a fourth ROM (6), connected to and addressable by the output of said addition stage (5) and having an output, for subjecting said combined phase values to square root extraction to produce modified phase values, and switch means connected to said addition stage (5) and to said fourth ROM (6) and connected for selecting, for ultimate conversion into amplitude values by said third ROM (9), either the output of said addition stage (5) or the output of said fourth ROM (6).
Claim 2
Dependent Claim
200 words
A test pattern generator for testing digital television signals which is capable of providing a circular zone plate pattern signal as well as other test pattern signals, comprising horizontal pixel rate and vertical line rate counters (1, 2) for generation of an orthogonal pixel raster, first and second ROMs (3, 4), each having an output and respectively connected to and addressable by said counters for respectively generating horizontal and vertical phase values, an addition stage (5) connected to the respective outputs of said ROMs for combining said phase values and a third ROM (9), connected for receiving phase values from said addition stage and having an output, for converting said combined phase values into amplitude values and further comprising: a fourth ROM (6), connected to and addressable by the output of said addition stage (5) and having an output, for subjecting said combined phase values to square root extraction to produce modified phase values, and switch means connected to said addition stage (5) and to said fourth ROM (6) and connected for selecting, for ultimate conversion into amplitude values by said third ROM (9), either the output of said addition stage (5) or the output of said fourth ROM (6).
Claim 3
Dependent Claim
46 words
The test pattern generator of claim 1, wherein said third ROM (9) is programmable and further comprising a microprocessor (14) connected for loading said programmable third ROM (9) with any of a plurality of selectable characteristic curves for conversion of combined phase values into amplitude values.
Claim 4
Dependent Claim
100 words
The test pattern generator of claim 1, further comprising a microprocessor (14), an accumulator (15) and a second addition stage (8) which is interposed between said switch means (7) and said third ROM (9) and which has one input connected to said switch means, another input connected to said microprocessor through said accumulator and an output connected to said third ROM (9), said microprocessor being programmed and connected for supplying to said second addition stage (8), through said accumulator, controllable values having variations that occur only within a vertical blanking interval for producing the effect of a moving test pattern.
Claim 5
Dependent Claim
54 words
The test pattern generator of claim 1, further comprising a fifth ROM (11) which is connected to the output of said third ROM (9) for insertion of markers in the output of said third ROM and means (12, 14) for controlling the insertion of markers in test patterns generated by said test pattern generator.
Claim 6
Dependent Claim
184 words
A test pattern generator for testing digital television signals according to the zone plate pattern generation principle for generating a variety of test pattern signals, comprising horizontal pixel rate and vertical line rate counters (1, 2) for generation of an orthogonal pixel raster, first and second programmable ROMs (3, 4), each having an output and respectively connected to and addressable by said counters for respectively generating horizontal and vertical phase values, an addition stage (5) connected to the respective outputs of said ROMs for combining said phase values and a third ROM (9), connected for receiving phase values from said addition stage and having an output, for converting said combined phase values into cyclical amplitude values and further comprising: a microprocessor (14) having outputs respectively connected to said first and second ROMs (3, 4) and being programmed for selectively loading into said first and second ROMs any of a plurality of mutually corresponding functions, whereby a variable scan raster is made available at the output of said addition stage 5 for generating a test pattern signal at the output of said third ROM (9).
Claim 7
Dependent Claim
184 words
A test pattern generator for testing digital television signals according to the zone plate pattern generation principle for generating a variety of test pattern signals, comprising horizontal pixel rate and vertical line rate counters (1, 2) for generation of an orthogonal pixel raster, first and second programmable ROMs (3, 4), each having an output and respectively connected to and addressable by said counters for respectively generating horizontal and vertical phase values, an addition stage (5) connected to the respective outputs of said ROMs for combining said phase values and a third ROM (9), connected for receiving phase values from said addition stage and having an output, for converting said combined phase values into cyclical amplitude values and further comprising: a microprocessor (14) having outputs respectively connected to said first and second ROMs (3, 4) and being programmed for selectively loading into said first and second ROMs any of a plurality of mutually corresponding functions, whereby a variable scan raster is made available at the output of said addition stage 5 for generating a test pattern signal at the output of said third ROM (9).
Claim 8
Dependent Claim
48 words
The test pattern generator of claim 5, wherein said third ROM (9) is programmable and wherein said microprocessor is (14) connected and programmed for loading said programmable third ROM (9) with any of a plurality of selectable characteristic curves for conversion of combined phase values into amplitude values.
Claim 9
Dependent Claim
99 words
The test pattern generator of claim 5, further comprising an accumulator (15) and a second addition stage (8) which is interposed between said switch means (7) and said third ROM (9) and which has one input connected to said switching means, another input connected to said microprocessor (14) through said accumulator (15) and an output connected to said third ROM (9), said microprocessor being programmed and connected for supplying to said second addition stage (8), through said accumulator, controllable values having variations that occur only within a vertical blanking interval for producing the effect of a moving test pattern.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-08-05 | 1995-02-04 | 1995-08-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-08-05 | 1999-02-04 | 1999-08-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-08-05 | 2003-02-04 | 2003-08-06 | $7700.00 | Window Closed / Lapsed |