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US5036295A Expired / Lapsed US ⏱️ 0.0 years remaining

Frequency synthesizer allowing rapid frequency switching

Assignee: Mitsubishi Electric Corp
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Filing: 1990-07-30
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Granted: 1991-07-30
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Expires: 2010-07-30
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Abstract

Abstract A frequency synthesizer is designed to modify voltage value data read out of a memory in accordance with the output voltage of a filter, and apply a d.c. voltage corresponding to the modified data to a second variable-capacitance diode at the control input of a VCO, thereby allowing the VCO frequency switching without imposing a significant fluctuation of the application voltage to a first variable-capacitance diode and accomplishing a short channel switching time and stable operation against temperature fluctuation. The device is further designed to supply a voltage setup value read out of the memory to the second variable-capacitance diode thereby to reduce the frequency matching time at channel switching, and to determine such another voltage setup value as to reduce the time of phase matching based on the trend of change in the filter output voltage and supply the value to the second variable-capacitance diode.

Inventors

  • 👤 Toshiki Kamitani

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 10:24
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/10; H03L1/00; H03L1/02; H03L1/022; H03L1/023; H03L1/025; H03L7/16; H03L7/18; H03L7/183; H03L7/187; H03L7/189; H03L2207/00; H03L2207/06

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 239 words
A frequency synthesizer, comprising: an oscillator which generates an oscillation output signal having a frequency determined by the total capacitance value of a variable capacitance input stage whose capacitance value varies as a function of input d.c. voltage; phase comparator means for comparing the phase of a signal proportional to said oscillation output signal with the phase of a reference signal, and outputting a phase difference signal corresponding to the phase difference therebetween; filter means for converting said phase difference signal into a first d.c. voltage and applying the first d.c. voltage to one input temrinal of said variable capacitance input stage; memory means for storing voltage value data representative of nominal d.c. voltage values to be applied to a second input terminal of said variable capacitance input stage according to the frequency of a channel indicated by channel data inputted to said synthesizer; voltage detection means for measuring the value of the d.c. voltage of said filter means and generating a measured signal representative thereof; computation means responsive to said channel data and said measured signal for reading nominal d.c. voltage value data from said memory means and modifying the read value data as a function of said measured signal to produce modified voltage value data; and conversion means for converting said modified voltage value data into a second d.c. voltage and applying said second d.c. voltage to said second input terminal of said variable capacitance input state.
Claim 2
Dependent Claim 239 words
A frequency synthesizer, comprising: an oscillator which generates an oscillation output signal having a frequency determined by the total capacitance value of a variable capacitance input stage whose capacitance value varies as a function of input d.c. voltage; phase comparator means for comparing the phase of a signal proportional to said oscillation output signal with the phase of a reference signal, and outputting a phase difference signal corresponding to the phase difference therebetween; filter means for converting said phase difference signal into a first d.c. voltage and applying the first d.c. voltage to one input temrinal of said variable capacitance input stage; memory means for storing voltage value data representative of nominal d.c. voltage values to be applied to a second input terminal of said variable capacitance input stage according to the frequency of a channel indicated by channel data inputted to said synthesizer; voltage detection means for measuring the value of the d.c. voltage of said filter means and generating a measured signal representative thereof; computation means responsive to said channel data and said measured signal for reading nominal d.c. voltage value data from said memory means and modifying the read value data as a function of said measured signal to produce modified voltage value data; and conversion means for converting said modified voltage value data into a second d.c. voltage and applying said second d.c. voltage to said second input terminal of said variable capacitance input state.
Claim 3
Dependent Claim 35 words
A frequency synthesizer according to claim 1, wherein said memory means stores, for all channels, voltage value data corresponding to d.c. voltages to be applied to said second input terminal diode at a certain temperature.
Claim 4
Dependent Claim 59 words
A frequency synthesizer according to claim 2, wherein said computation means holds the value of said measured signal which has been introduced at the previous channel switching, and produces modified data to be used for the present channel switching from the value that has been held and the voltage value data which is read out of said memory means.
Claim 5
Dependent Claim 68 words
A frequency synthesizer according to claim 3, wherein said computation means produces modified data which is larger than the voltage value data read out of said memory means if the value that has been held is larger than a certain reference value, and produces modified data which is smaller than said voltage value data if the value that has been held is smaller than a certain reference value.
Claim 6
Dependent Claim 287 words
A frequency synthesizer, comprising: an oscillator which generates an oscillation output signal having a frequency determined by the total capacitance value of a variable capacitance input stage whose capacitance value varies as a function of input d.c. voltage; phase comparator means for comparing the phase of a signal proportional to said oscillation output signal with the phase of a reference signal, and outputting a phase difference signal corresponding to the phase difference therebetween; filter means for converting said phase difference signal into a first d.c. voltage and applying the first d.c. voltage to one input terminal of said variable capacitance input stage; memory means for storing voltage value data representative of nominal d.c. voltage values to be applied to a second input terminal of said variable capacitance input stage according to the frequency of a channel indicated by channel data inputted to said synthesizer; a voltage detection means which measures the output voltage of said filter means; conversion means for converting the outputted voltage value data from said computation means into a second d.c. voltage and applying said second d.c. voltage to said second input terminal of said variable capacitance input stage; voltage detection means for measuring the value of the d.c. voltage of said filter means subsequent to the application of said second d.c. voltage and generating a measured signal representative thereof; said computation means further being responsive to said measured signal for modifying the read value data as a function of said measured signal to produce modified voltage value data, and said conversion means further converting said modified voltage value data into a modified second d.c. voltage and applying said modified second d.c. voltage to said second input terminal of said variable capacitance input stage.
Claim 7
Dependent Claim 287 words
A frequency synthesizer, comprising: an oscillator which generates an oscillation output signal having a frequency determined by the total capacitance value of a variable capacitance input stage whose capacitance value varies as a function of input d.c. voltage; phase comparator means for comparing the phase of a signal proportional to said oscillation output signal with the phase of a reference signal, and outputting a phase difference signal corresponding to the phase difference therebetween; filter means for converting said phase difference signal into a first d.c. voltage and applying the first d.c. voltage to one input terminal of said variable capacitance input stage; memory means for storing voltage value data representative of nominal d.c. voltage values to be applied to a second input terminal of said variable capacitance input stage according to the frequency of a channel indicated by channel data inputted to said synthesizer; a voltage detection means which measures the output voltage of said filter means; conversion means for converting the outputted voltage value data from said computation means into a second d.c. voltage and applying said second d.c. voltage to said second input terminal of said variable capacitance input stage; voltage detection means for measuring the value of the d.c. voltage of said filter means subsequent to the application of said second d.c. voltage and generating a measured signal representative thereof; said computation means further being responsive to said measured signal for modifying the read value data as a function of said measured signal to produce modified voltage value data, and said conversion means further converting said modified voltage value data into a modified second d.c. voltage and applying said modified second d.c. voltage to said second input terminal of said variable capacitance input stage.
Claim 8
Dependent Claim 91 words
A frequency synthesizer according to claim 5, wherein said computation means produces modified voltage value data which is larger than the voltage value data read from said memory means if the measured signal value has a rising trend, and produces modified voltage value data which is smaller than the voltage value data read from said memory means if the measured signal value has a falling trend. computation means responsive to said channel data for reading nominal d.c. voltage value data from said memory means and outputting oscillator, read voltage value data;
Claim 9
Dependent Claim 36 words
A frequency synthesizer according to claim 5 further comprising a temperature sensor which measures the ambient temperature of said oscillator said temperature sensor having an output value delivered to an address line of said memory means.
Claim 10
Dependent Claim 29 words
A frequency synthesizer according to claim 7, wherein said memory means stores voltage value data for all channels and in correspondence to temperature values provided by said temperature sensor.
Claim 11
Dependent Claim 335 words
A frequency synthesizer, comprising: an oscillator which generates an oscillation output signal having a frequency determined by the total capacitance value of a variable capacitance input stage whose capacitance value varies as a function of input d.c. voltage; phase comparator means for comparing the phase of a signal proportional to said oscillation output signal with the phase of a reference signal, and outputting a phase difference signal corresponding to the phase difference therebetween; filter means for converting said phase difference signal into a first d.c. voltage and applying the first d.c. voltage to one input terminal of said variable capacitance input stage; memory means for storing voltage value data representative of nominal d.c. voltage values to be applied to a second input terminal of said variable capacitance input stage according to the frequency of a channel indicated by channel data inputted to said synthesizer; a computation means which modifies voltage value data read out of said memory means in accordance with the output value provided by said voltage detection means at the previous channel switching thereby to produce modified data, and thereafter produces another voltage setup value in accordance with the output value of said voltage detection means; and conversion means for converting the first modified voltage value data from said computation means into a second d.c. voltage and applying said second d.c. voltage to said second input terminal of said variable capacitance input stage; said voltage detection means further measuring the value of the d.c. voltage of said filter means subsequent to the application of said second d.c. voltage and generating a second measured signal representative thereof; said computation means further being responsive to said second measured signal for modifying the read value data as a function of said measured signal to produce second modified voltage value data, and said conversion means further converting said second modified voltage value data into a modified second d.c. voltage and applying said modified second d.c. voltage to said second input terminal of said variable capacitance input stage.
Claim 12
Dependent Claim 335 words
A frequency synthesizer, comprising: an oscillator which generates an oscillation output signal having a frequency determined by the total capacitance value of a variable capacitance input stage whose capacitance value varies as a function of input d.c. voltage; phase comparator means for comparing the phase of a signal proportional to said oscillation output signal with the phase of a reference signal, and outputting a phase difference signal corresponding to the phase difference therebetween; filter means for converting said phase difference signal into a first d.c. voltage and applying the first d.c. voltage to one input terminal of said variable capacitance input stage; memory means for storing voltage value data representative of nominal d.c. voltage values to be applied to a second input terminal of said variable capacitance input stage according to the frequency of a channel indicated by channel data inputted to said synthesizer; a computation means which modifies voltage value data read out of said memory means in accordance with the output value provided by said voltage detection means at the previous channel switching thereby to produce modified data, and thereafter produces another voltage setup value in accordance with the output value of said voltage detection means; and conversion means for converting the first modified voltage value data from said computation means into a second d.c. voltage and applying said second d.c. voltage to said second input terminal of said variable capacitance input stage; said voltage detection means further measuring the value of the d.c. voltage of said filter means subsequent to the application of said second d.c. voltage and generating a second measured signal representative thereof; said computation means further being responsive to said second measured signal for modifying the read value data as a function of said measured signal to produce second modified voltage value data, and said conversion means further converting said second modified voltage value data into a modified second d.c. voltage and applying said modified second d.c. voltage to said second input terminal of said variable capacitance input stage.
Claim 13
Dependent Claim 34 words
A frequency synthesizer according to claim 9, wherein said memory means stores, for all channels, voltage value data corresponding to voltages to be applied to said second input terminal diode at a certain temperature.
Claim 14
Dependent Claim 65 words
A frequency synthesizer according to claim 10, wherein said computation means produces modified data which is larger than the voltage value data read out of said memory means if the measured signal value held is larger than a certain reference value, and produces modified data which is smaller than said voltage value data if the measured signal value is smaller than a certain reference value.
Claim 15
Dependent Claim 70 words
A frequency synthesizer according to claim 9, wherein said computation means produces second modified voltage value data which is larger than the voltage value data read from said memory means if the second measured signal value has a rising trend, and produces second modified voltage value data which is smaller than the voltage value data read from said memory means if the second measured signal value has a falling trend.

References Cited (Backward Citations)

US4511858A Cited
JPS57160227A Cited
US4562410A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1994-07-29 1995-01-28 1995-07-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1998-07-29 1999-01-28 1999-07-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2002-07-29 2003-01-28 2003-07-30 $7700.00 Window Closed / Lapsed

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