Patent US5030927A successfully refreshed from Google Patents.
US5030927A
Expired / Lapsed
US
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Reactance control circuit with a DC amplifier for minimizing a variation of a reference reactance value
Assignee: Toshiba Corp
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Filing: 1990-03-12
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Granted: 1991-07-09
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Expires: 2010-03-12
Abstract
Abstract A reactance control circuit comprising a variable reactance circuit whose reactance is determined by the currents flowing to first and second differential transistor circuits, a differential amplifier for producing first and second currents in accordance with an input voltage, and a DC amplifier circuit for amplifying the first and second currents and supplying the amplified currents to the variable reactance circuit in order to control the currents flowing to the first and second differential transistor circuits. The DC amplifier circuit includes first and second transistors for supplying output currents to the variable reactance circuit, and a base potential control circuit for, when the first and second currents are equal to each other, supplying a predetermined low potential to the bases of the first and second transistors so that the currents flowing to the first and second transistors are both reduced.
Inventors
- 👤 Masashi Itoh
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 18:11
CPC Classifications
H; H03; H03B; H03B5/00; H03B5/30; H03B5/32; H03B5/36; H03B5/366; H03J; H03J7/00; H03H; H03H11/00; H03H11/46; H03H11/48
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
274 words
A reactance control circuit comprising: a variable reactance circuit having first and second differential transistor circuits, a reactance of said variable reactance circuit being determined by currents flowing in said first and second differential transistor circuits; a differential amplifier for producing first and second currents in accordance with an input voltage; and a DC amplifier circuit for amplifying the first and second currents derived from said differential amplifier, and for supplying the amplified currents to said variable reactance circuit to control the currents flowing in said first and second differential transistor circuits; said DC amplifier circuit including first and second input terminals for receiving said first and second currents output from said differential amplifier, first and second output terminals for supplying third and fourth currents, the third and fourth currents being the amplified currents supplied to said variable reactance circuit, a first transistor having a collector coupled to said first output terminal, an emitter coupled to a predetermined potential supplying terminal and a base, a second transistor having a collector coupled to said second output terminal, an emitter coupled to said predetermined potential supplying terminal and a base, and base potential control means for, when said first and second currents differ from each other, supplying different potentials to the bases of said first and second transistors so that the third and fourth currents flow through said first and second transistors, respectively, and, when the first and second currents are equal to each other, supplying a predetermined low potential to the bases of the first and second transistors so that the third and fourth currents flowing through the first and second transistors are both reduced.
Claim 2
Dependent Claim
274 words
A reactance control circuit comprising: a variable reactance circuit having first and second differential transistor circuits, a reactance of said variable reactance circuit being determined by currents flowing in said first and second differential transistor circuits; a differential amplifier for producing first and second currents in accordance with an input voltage; and a DC amplifier circuit for amplifying the first and second currents derived from said differential amplifier, and for supplying the amplified currents to said variable reactance circuit to control the currents flowing in said first and second differential transistor circuits; said DC amplifier circuit including first and second input terminals for receiving said first and second currents output from said differential amplifier, first and second output terminals for supplying third and fourth currents, the third and fourth currents being the amplified currents supplied to said variable reactance circuit, a first transistor having a collector coupled to said first output terminal, an emitter coupled to a predetermined potential supplying terminal and a base, a second transistor having a collector coupled to said second output terminal, an emitter coupled to said predetermined potential supplying terminal and a base, and base potential control means for, when said first and second currents differ from each other, supplying different potentials to the bases of said first and second transistors so that the third and fourth currents flow through said first and second transistors, respectively, and, when the first and second currents are equal to each other, supplying a predetermined low potential to the bases of the first and second transistors so that the third and fourth currents flowing through the first and second transistors are both reduced.
Claim 3
Dependent Claim
148 words
The reactance control circuit according to claim 1, wherein said base potential control means includes a third transistor having a collector coupled to the base of said first transistor, an emitter coupled to said predetermined potential supplying terminal, and a base; a fourth transistor having a collector coupled to the base of said second transistor, an emitter coupled to said predetermined potential supplying terminal, and a base coupled to the base of said third transistor; a first impedance element coupled between said first input terminal and the bases of said third and fourth transistors; a second impedance element coupled between said second input terminal and the bases of said third and fourth transistors; a third impedance element coupled between said first input terminal and the base of said first transistor; and a fourth impedance element coupled between said second input terminal and the base of said second transistor.
Claim 4
Dependent Claim
22 words
The reactance control circuit according to claim 2, wherein the resistive components of said first and second impedance elements are substantially equal.
Claim 5
Dependent Claim
22 words
The reactance control circuit according to claim 2, wherein the resistive components of said third and fourth impedance elements are substantially equal.
Claim 6
Dependent Claim
19 words
The reactance control circuit according to claim 2, wherein said first, second, third and fourth transistors have equal geometrics.
Claim 7
Dependent Claim
143 words
The reactance control circuit according to claim 1, wherein said base potential control means includes a third transistor having a collector coupled to the base of said first transistor, an emitter having an area N times larger than an emitter area of said first transistor and coupled to said predetermined potential supply terminal, and a base; a fourth transistor having a collector coupled to the base of second transistor, an emitter having an area N times larger than an emitter area of said second transistor and coupled to said predetermined potential supply terminal, and a base coupled to the base of said third transistor; a first impedance element, coupled between said first input terminal and the bases of said third and fourth transistors; and a second impedance element, coupled between said second input terminal and the bases of said third and fourth transistors.
Claim 8
Dependent Claim
22 words
The reactance control circuit according to claim 6, wherein the resistive components of said first and second impedance elements are substantially equal.
Claim 9
Dependent Claim
17 words
The reactance control circuit according to claim 6, wherein said first and second transistors have equal geometries.
Claim 10
Dependent Claim
148 words
The reactance control circuit according to claim 1, wherein said base potential control means includes a third transistor having a collector coupled to the base of said first transistor, an emitter coupled to said predetermined potential supply terminal, and a base, the current flowing in the third transistor being N times the current flowing in the first transistor; a fourth transistor having a collector coupled to the base of said second transistor, an emitter coupled to said predetermined potential supply terminal, and a base coupled to the base of said third transistor, the current flowing in the fourth transistor being N times the current flowing in the second transistor; a first impedance element, coupled between said first input terminal and the bases of said third and fourth transistors; and a second impedance element, coupled between said second input terminal and the bases of said third and fourth transistors.
Claim 11
Dependent Claim
22 words
The reactance control circuit according to claim 2, wherein said first, second, third and fourth transistors have equal geometries and operating characteristics.
Claim 12
Dependent Claim
157 words
A reactance control circuit for a variable frequency oscillator comprising current generating means for generating first and second currents and a variable reactance circuit having a reactance which varies relative to a predetermined reactance in response to a current differential of third and fourth currents so as to vary a frequency of an output signal of said variable frequency oscillator relative to a predetermined frequency, said reactance control circuit comprising an amplifier circuit coupled to said current generating means and said variable reactance circuit for amplifying the first and second currents to the third and fourth currents and minimizing means for varying the current differential of the third and fourth currents to a predetermined relationship when the first current is substantially equal to the second current so that the frequency of the output signal of said variable frequency oscillator is substantially equal to the predetermined frequency when the first current is substantially equal to the second current.
Claim 13
Dependent Claim
157 words
A reactance control circuit for a variable frequency oscillator comprising current generating means for generating first and second currents and a variable reactance circuit having a reactance which varies relative to a predetermined reactance in response to a current differential of third and fourth currents so as to vary a frequency of an output signal of said variable frequency oscillator relative to a predetermined frequency, said reactance control circuit comprising an amplifier circuit coupled to said current generating means and said variable reactance circuit for amplifying the first and second currents to the third and fourth currents and minimizing means for varying the current differential of the third and fourth currents to a predetermined relationship when the first current is substantially equal to the second current so that the frequency of the output signal of said variable frequency oscillator is substantially equal to the predetermined frequency when the first current is substantially equal to the second current.
Claim 14
Dependent Claim
36 words
The reactance control circuit for a variable frequency oscillator according to claim 11, wherein the predetermined relationship between the third and fourth currents is when the current differential of the third and fourth currently is minimized.
Claim 15
Dependent Claim
176 words
A variable frequency oscillator for generating an output signal, comprising: a current generating circuit for generating first and second currents; a variable reactance circuit having a reactance which varies relative to a predetermined reactance in response to a current differential of third and fourth currents so as to vary a frequency of the output signal relative to a predetermined frequency; an oscillator means responsive to the variable reactance circuit for producing an output signal whose frequency is determined by the reactance of said variable reactance circuit, and; a reactance control circuit for controlling the reactance of said variable reactance circuit, said reactance control circuit including amplifying means for amplifying the first and second currents to the third and fourth currents and minimizing means for substantially minimizing the current differential of the third and fourth currents when the first current is substantially equal to the second current so that the reactance of said variable reactance circuit is substantially equal to the predetermined reactance and the frequency of the output signal is substantially equal to the predetermined frequency.
Claim 16
Dependent Claim
176 words
A variable frequency oscillator for generating an output signal, comprising: a current generating circuit for generating first and second currents; a variable reactance circuit having a reactance which varies relative to a predetermined reactance in response to a current differential of third and fourth currents so as to vary a frequency of the output signal relative to a predetermined frequency; an oscillator means responsive to the variable reactance circuit for producing an output signal whose frequency is determined by the reactance of said variable reactance circuit, and; a reactance control circuit for controlling the reactance of said variable reactance circuit, said reactance control circuit including amplifying means for amplifying the first and second currents to the third and fourth currents and minimizing means for substantially minimizing the current differential of the third and fourth currents when the first current is substantially equal to the second current so that the reactance of said variable reactance circuit is substantially equal to the predetermined reactance and the frequency of the output signal is substantially equal to the predetermined frequency.
Claim 17
Dependent Claim
28 words
The variable frequency oscillator according to claim 13 wherein said variable reactance circuit includes first and second differential transistor circuits which respectively receive the third and fourth currents.
Claim 18
Dependent Claim
44 words
The variable frequency oscillator according to claim 14 wherein said amplifying means comprises first and second transistors each having a base, a collector and an emitter and said minimizing means comprises a control circuit for controlling base potentials of said first and second transistors.
Claim 19
Dependent Claim
36 words
The variable frequency oscillator according to claim 15 wherein said first and second transistors comprise NPN transistors, the collectors of said first and second transistors being respectively coupled to said first and second differential transistor circuits.
Claim 20
Dependent Claim
136 words
The variable frequency oscillator according to claim 16 wherein said control circuit comprises first and second nodes for respectively receiving said first and second currents, first and second resistors coupled between said first and second nodes, a third resistor and a third transistor having a collector-to-emitter path coupled between said first node and ground potential, a fourth resistor and a fourth transistor having a collector-to-emitter path coupled between said second node and ground potential, the base of said first transistor coupled to a point between said third resistor and the collector of said third transistor, the base of said second transistor coupled to a point between said fourth resistor and the collector of said fourth transistor, and the bases of said third and fourth transistors being coupled to a point between said first and second resistors.
Claim 21
Dependent Claim
17 words
The variable frequency oscillator according to claim 13 wherein said current generating circuit comprises a different amplifier.
References Cited (Backward Citations)
US4581593A
Cited
US4745375A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-07-08 | 1995-01-07 | 1995-07-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-07-08 | 1999-01-07 | 1999-07-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-07-08 | 2003-01-07 | 2003-07-09 | $7700.00 | Window Closed / Lapsed |